Datasheet

© 2009-2011 Microchip Technology Inc. DS22188C-page 27
MCP621/1S/2/3/4/5/9
4.4 Improving Stability
4.4.1 CAPACITIVE LOADS
Driving large capacitive loads can cause stability
problems for voltage feedback op amps. As the load
capacitance increases, the feedback loop’s phase
margin decreases and the closed-loop bandwidth is
reduced. This produces gain peaking in the frequency
response, with overshoot and ringing in the step
response. See Figure 2-30. A unity gain buffer (G = +1)
is the most sensitive to capacitive loads, though all
gains show the same general behavior.
When driving large capacitive loads with these op
amps (e.g., > 10 pF when G = +1), a small series
resistor at the output (R
ISO
in Figure 4-9) improves the
feedback loop’s phase margin (stability) by making the
output load resistive at higher frequencies. The
bandwidth will be generally lower than the bandwidth
with no capacitive load.
FIGURE 4-9: Output Resistor, R
ISO
Stabilizes Large Capacitive Loads.
Figure 4-10 gives recommended R
ISO
values for
different capacitive loads and gains. The x-axis is the
normalized load capacitance (C
L
/G
N
), where G
N
is the
circuit’s noise gain. For non-inverting gains, G
N
and the
Signal Gain are equal. For inverting gains, G
N
is
1+|Signal Gain| (e.g., -1 V/V gives G
N
=+2V/V).
FIGURE 4-10: Recommended R
ISO
Values
for Capacitive Loads.
After selecting R
ISO
for your circuit, double check the
resulting frequency response peaking and step
response overshoot. Modify R
ISO
’s value until the
response is reasonable. Bench evaluation and
simulations with the MCP621/1S/2/3/4/5/9 SPICE
macro model are helpful.
4.4.2 GAIN PEAKING
Figure 4-11 shows an op amp circuit that represents
non-inverting amplifiers (V
M
is a DC voltage and V
P
is
the input) or inverting amplifiers (V
P
is a DC voltage
and V
M
is the input). The capacitances C
N
and C
G
represent the total capacitance at the input pins; they
include the op amp’s Common mode input capacitance
(C
CM
), board parasitic capacitance and any capacitor
placed in parallel.
FIGURE 4-11: Amplifier with Parasitic
Capacitance.
C
G
acts in parallel with R
G
(except for a gain of +1 V/V),
which causes an increase in gain at high frequencies.
C
G
also reduces the phase margin of the feedback
loop, which becomes less stable. This effect can be
reduced by either reducing C
G
or R
F
.
C
N
and R
N
form a low-pass filter that affects the signal
at V
P
. This filter has a single real pole at 1/(2πR
N
C
N
).
The largest value of R
F
that should be used depends
on noise gain (see G
N
in Section 4.4.1 “Capacitive
Loads”) and C
G
. Figure 4-12 shows the maximum
recommended R
F
for several C
G
values.
FIGURE 4-12: Maximum Recommended
R
F
vs. Gain.
Figures 2-37 and 2-38 show the small signal and large
signal step responses at G = +1 V/V. The unity gain
buffer usually has R
F
=0Ω and R
G
open.
Figures 2-39 and 2-40 show the small signal and large
signal step responses at G = -1 V/V. Since the noise
gain is 2 V/V and C
G
≈ 10 pF, the resistors were
chosen to be R
F
=R
G
=1kΩ and R
N
=500Ω.
R
ISO
V
OUT
C
L
R
G
R
F
R
N
MCP62X
1
10
100
1,000
1.E-12 1.E-11 1.E-10 1.E-09 1.E-08
Normalized Capacitance; C
L
/G
N
(F)
Recommended R
ISO
(Ω)
G
N
= +1
G
N
≥
+2
1p 100p 1n 10n10p
V
P
R
F
V
OUT
R
N
C
N
V
M
R
G
C
G
MCP62X
1.E+02
1.E+03
1.E+04
1.E+05
110100
Noise Gain; G
N
(V/V)
Maximum Recommended R
F
(Ω)
G
N
> +1 V/V
100
10k
100k
1k
C
G
= 10 pF
C
G
= 32 pF
C
G
= 100 pF
C
G
= 320 pF
C
G
= 1 nF