Datasheet
Table Of Contents
- 1.0 Electrical Characteristics
- 2.0 Typical Performance Curves
- FIGURE 2-1: Input Offset Voltage at VDD = 5.5V.
- FIGURE 2-2: Input Offset Voltage at VDD = 2.3V.
- FIGURE 2-3: Input Bias Current at VDD = 5.5V.
- FIGURE 2-4: Input Offset Voltage Drift at VDD = 5.5V.
- FIGURE 2-5: Input Offset Voltage Drift at VDD = 2.3V.
- FIGURE 2-6: Input Offset Current at VDD = 5.5V.
- FIGURE 2-7: Input Offset Voltage vs. Ambient Temperature.
- FIGURE 2-8: Quiescent Current vs. Ambient Temperature.
- FIGURE 2-9: Maximum Output Voltage Swing vs. Ambient Temperature at RL = 5 kW.
- FIGURE 2-10: Input Bias, Offset Currents vs. Ambient Temperature.
- FIGURE 2-11: CMRR, PSRR vs. Ambient Temperature.
- FIGURE 2-12: Maximum Output Voltage Swing vs. Ambient Temperature at RL = 25 kW.
- FIGURE 2-13: Output Short Circuit Current vs. Ambient Temperature.
- FIGURE 2-14: Slew Rate vs. Ambient Temperature.
- FIGURE 2-15: Input Bias, Offset Currents vs. Common Mode Input Voltage.
- FIGURE 2-16: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature.
- FIGURE 2-17: Input Offset Voltage vs. Common Mode Input Voltage.
- FIGURE 2-18: Input Offset Voltage vs. Output Voltage.
- FIGURE 2-19: Quiescent Current vs. Power Supply Voltage.
- FIGURE 2-20: DC Open-Loop Gain vs. Load Resistance.
- FIGURE 2-21: Gain-Bandwidth Product, Phase Margin vs. Load Resistance.
- FIGURE 2-22: Output Voltage Headroom vs. Output Current Magnitude.
- FIGURE 2-23: DC Open-Loop Gain vs. Power Supply Voltage.
- FIGURE 2-24: Channel-to-Channel Separation vs. Frequency (MCP617 and MCP619 only).
- FIGURE 2-25: Open-Loop Gain, Phase vs. Frequency.
- FIGURE 2-26: Input Noise Voltage, Current Densities vs. Frequency.
- FIGURE 2-27: Small-Signal, Non-Inverting Pulse Response.
- FIGURE 2-28: CMRR, PSRR vs. Frequency.
- FIGURE 2-29: Maximum Output Voltage Swing vs. Frequency.
- FIGURE 2-30: Small-Signal, Inverting Pulse Response.
- FIGURE 2-31: Large-Signal, Non-Inverting Pulse Response.
- FIGURE 2-32: Chip Select (CS) to Amplifier Output Response Time (MCP618 only).
- FIGURE 2-33: The MCP616/7/8/9 Show No Phase Reversal.
- FIGURE 2-34: Large-Signal, Inverting Pulse Response.
- FIGURE 2-35: Chip Select (CS) Internal Hysteresis (MCP618 only).
- FIGURE 2-36: Measured Input Current vs. Input Voltage (below VSS).
- 3.0 Pin Descriptions
- 4.0 Applications Information
- 5.0 Design Aids
- 6.0 Packaging Information
© 2008 Microchip Technology Inc. DS21613C-page 5
MCP616/7/8/9
TEMPERATURE CHARACTERISTICS
1.1 Test Circuits
The test circuits used for the DC and AC tests are
shown in Figure 1-2 and Figure 1-3. The bypass
capacitors are laid out according to the rules discussed
in Section 4.6 “Supply Bypass”.
FIGURE 1-2: AC and DC Test Circuit for
Most Non-Inverting Gain Conditions.
FIGURE 1-3: AC and DC Test Circuit for
Most Inverting Gain Conditions.
Electrical Specifications: Unless otherwise indicated, V
DD
= +2.3V to +5.5V and V
SS
=GND.
Parameters Sym Min Typ Max Units Conditions
Temperature Ranges
Specified Temperature Range T
A
-40 — +85 °C
Operating Temperature Range T
A
-40 — +125 °C Note 1
Storage Temperature Range T
A
-65 — +150 °C
Thermal Package Resistances
Thermal Resistance, 8L-MSOP θ
JA
—211 — °C/W
Thermal Resistance, 8L-PDIP θ
JA
— 89.3 — °C/W
Thermal Resistance, 8L-SOIC θ
JA
— 149.5 — °C/W
Thermal Resistance, 14L-PDIP θ
JA
—70 — °C/W
Thermal Resistance, 14L-SOIC θ
JA
— 95.3 — °C/W
Thermal Resistance, 14L-TSSOP θ
JA
— 100 — °C/W
Note 1: The MCP616/7/8/9 operate over this extended temperature range, but with reduced performance. In any case, the
Junction Temperature (T
J
) must not exceed the Absolute Maximum specification of +150°C.
V
DD
MCP61X
R
G
R
F
R
N
V
OUT
V
IN
V
DD
/2
1µF
C
L
R
L
V
L
0.1 µF
V
DD
MCP61X
R
G
R
F
R
N
V
OUT
V
DD
/2
V
IN
1µF
C
L
R
L
V
L
0.1 µF