Datasheet
Table Of Contents
- 1.0 Electrical Characteristics
- 2.0 Typical Performance Curves
- FIGURE 2-1: Input Offset Voltage at VDD = 5.5V.
- FIGURE 2-2: Input Offset Voltage at VDD = 2.3V.
- FIGURE 2-3: Input Bias Current at VDD = 5.5V.
- FIGURE 2-4: Input Offset Voltage Drift at VDD = 5.5V.
- FIGURE 2-5: Input Offset Voltage Drift at VDD = 2.3V.
- FIGURE 2-6: Input Offset Current at VDD = 5.5V.
- FIGURE 2-7: Input Offset Voltage vs. Ambient Temperature.
- FIGURE 2-8: Quiescent Current vs. Ambient Temperature.
- FIGURE 2-9: Maximum Output Voltage Swing vs. Ambient Temperature at RL = 5 kW.
- FIGURE 2-10: Input Bias, Offset Currents vs. Ambient Temperature.
- FIGURE 2-11: CMRR, PSRR vs. Ambient Temperature.
- FIGURE 2-12: Maximum Output Voltage Swing vs. Ambient Temperature at RL = 25 kW.
- FIGURE 2-13: Output Short Circuit Current vs. Ambient Temperature.
- FIGURE 2-14: Slew Rate vs. Ambient Temperature.
- FIGURE 2-15: Input Bias, Offset Currents vs. Common Mode Input Voltage.
- FIGURE 2-16: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature.
- FIGURE 2-17: Input Offset Voltage vs. Common Mode Input Voltage.
- FIGURE 2-18: Input Offset Voltage vs. Output Voltage.
- FIGURE 2-19: Quiescent Current vs. Power Supply Voltage.
- FIGURE 2-20: DC Open-Loop Gain vs. Load Resistance.
- FIGURE 2-21: Gain-Bandwidth Product, Phase Margin vs. Load Resistance.
- FIGURE 2-22: Output Voltage Headroom vs. Output Current Magnitude.
- FIGURE 2-23: DC Open-Loop Gain vs. Power Supply Voltage.
- FIGURE 2-24: Channel-to-Channel Separation vs. Frequency (MCP617 and MCP619 only).
- FIGURE 2-25: Open-Loop Gain, Phase vs. Frequency.
- FIGURE 2-26: Input Noise Voltage, Current Densities vs. Frequency.
- FIGURE 2-27: Small-Signal, Non-Inverting Pulse Response.
- FIGURE 2-28: CMRR, PSRR vs. Frequency.
- FIGURE 2-29: Maximum Output Voltage Swing vs. Frequency.
- FIGURE 2-30: Small-Signal, Inverting Pulse Response.
- FIGURE 2-31: Large-Signal, Non-Inverting Pulse Response.
- FIGURE 2-32: Chip Select (CS) to Amplifier Output Response Time (MCP618 only).
- FIGURE 2-33: The MCP616/7/8/9 Show No Phase Reversal.
- FIGURE 2-34: Large-Signal, Inverting Pulse Response.
- FIGURE 2-35: Chip Select (CS) Internal Hysteresis (MCP618 only).
- FIGURE 2-36: Measured Input Current vs. Input Voltage (below VSS).
- 3.0 Pin Descriptions
- 4.0 Applications Information
- 5.0 Design Aids
- 6.0 Packaging Information
© 2008 Microchip Technology Inc. DS21613C-page 23
MCP616/7/8/9
6.0 PACKAGING INFORMATION
6.1 Package Marking Information
XXXXXXXX
XXXXXNNN
YYWW
8-Lead PDIP (300 mil)
Examples:
8-Lead SOIC (150 mil)
Examples:
XXXXXXXX
XXXXYYWW
NNN
MCP616
I/P ^^ 256
0812
MCP616I
SN^^ 0812
256
8-Lead MSOP
Example:
XXXXXX
YWWNNN
616I
812256
Legend: XX...X Customer-specific information
Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
* This package is Pb-free. The Pb-free JEDEC designator ( )
can be found on the outer packaging for this package.
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
3
e
3
e
3
e
MCP616
I/P256
0812
MCP616
I/SN0812
256
OR
OR
3
e