Datasheet
Table Of Contents
- 1.0 Electrical Characteristics
- 2.0 Typical Performance Curves
- FIGURE 2-1: Input Offset Voltage at VDD = 5.5V.
- FIGURE 2-2: Input Offset Voltage at VDD = 2.3V.
- FIGURE 2-3: Input Bias Current at VDD = 5.5V.
- FIGURE 2-4: Input Offset Voltage Drift at VDD = 5.5V.
- FIGURE 2-5: Input Offset Voltage Drift at VDD = 2.3V.
- FIGURE 2-6: Input Offset Current at VDD = 5.5V.
- FIGURE 2-7: Input Offset Voltage vs. Ambient Temperature.
- FIGURE 2-8: Quiescent Current vs. Ambient Temperature.
- FIGURE 2-9: Maximum Output Voltage Swing vs. Ambient Temperature at RL = 5 kW.
- FIGURE 2-10: Input Bias, Offset Currents vs. Ambient Temperature.
- FIGURE 2-11: CMRR, PSRR vs. Ambient Temperature.
- FIGURE 2-12: Maximum Output Voltage Swing vs. Ambient Temperature at RL = 25 kW.
- FIGURE 2-13: Output Short Circuit Current vs. Ambient Temperature.
- FIGURE 2-14: Slew Rate vs. Ambient Temperature.
- FIGURE 2-15: Input Bias, Offset Currents vs. Common Mode Input Voltage.
- FIGURE 2-16: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature.
- FIGURE 2-17: Input Offset Voltage vs. Common Mode Input Voltage.
- FIGURE 2-18: Input Offset Voltage vs. Output Voltage.
- FIGURE 2-19: Quiescent Current vs. Power Supply Voltage.
- FIGURE 2-20: DC Open-Loop Gain vs. Load Resistance.
- FIGURE 2-21: Gain-Bandwidth Product, Phase Margin vs. Load Resistance.
- FIGURE 2-22: Output Voltage Headroom vs. Output Current Magnitude.
- FIGURE 2-23: DC Open-Loop Gain vs. Power Supply Voltage.
- FIGURE 2-24: Channel-to-Channel Separation vs. Frequency (MCP617 and MCP619 only).
- FIGURE 2-25: Open-Loop Gain, Phase vs. Frequency.
- FIGURE 2-26: Input Noise Voltage, Current Densities vs. Frequency.
- FIGURE 2-27: Small-Signal, Non-Inverting Pulse Response.
- FIGURE 2-28: CMRR, PSRR vs. Frequency.
- FIGURE 2-29: Maximum Output Voltage Swing vs. Frequency.
- FIGURE 2-30: Small-Signal, Inverting Pulse Response.
- FIGURE 2-31: Large-Signal, Non-Inverting Pulse Response.
- FIGURE 2-32: Chip Select (CS) to Amplifier Output Response Time (MCP618 only).
- FIGURE 2-33: The MCP616/7/8/9 Show No Phase Reversal.
- FIGURE 2-34: Large-Signal, Inverting Pulse Response.
- FIGURE 2-35: Chip Select (CS) Internal Hysteresis (MCP618 only).
- FIGURE 2-36: Measured Input Current vs. Input Voltage (below VSS).
- 3.0 Pin Descriptions
- 4.0 Applications Information
- 5.0 Design Aids
- 6.0 Packaging Information
MCP616/7/8/9
DS21613C-page 18 © 2008 Microchip Technology Inc.
4.8 PCB Surface Leakage
In applications where low input bias current is critical,
Printed Circuit Board (PCB) surface leakage effects
need to be considered. Surface leakage is caused by
humidity, dust or other contamination on the board.
Under low humidity conditions, a typical resistance
between nearby traces is 10
12
Ω. A 5V difference would
cause 5 pA of current to flow, which is greater than the
MCP616/7/8/9 family’s bias current at 25°C
(1 pA, typical).
The easiest way to reduce surface leakage is to use a
guard ring around sensitive pins (or traces). The guard
ring is biased at the same voltage as the sensitive pin.
An example is shown below in Figure 4-8.
FIGURE 4-8: Example Guard Ring Layout
for Inverting Gain.
1. Non-inverting Gain and Unity Gain Buffer:
a) Connect the non-inverting pin (V
IN
+) to the
input with a wire that does not touch the
PCB surface.
b) Connect the guard ring to the inverting input
pin (V
IN
–). This biases the guard ring to the
common mode input voltage.
2. Inverting Gain and Transimpedance gain (con-
vert current to voltage, such as photo detectors)
amplifiers:
a) Connect the guard ring to the non-inverting
input pin (V
IN
+). This biases the guard ring
to the same reference voltage as the op
amp (e.g., V
DD
/2 or ground).
b) Connect the inverting pin (V
IN
–) to the input
with a wire that does not touch the PCB
surface.
4.9 Application Circuits
4.9.1 HIGH GAIN PRE-AMPLIFIER
The MCP616/7/8/9 op amps are well suited to
amplifying small signals produced by low-impedance
sources/sensors. The low offset voltage, low offset
current and low noise fit well in this role. Figure 4-9
shows a typical pre-amplifier connected to a low-
impedance source (V
S
and R
S
).
FIGURE 4-9: High Gain Pre-amplifier.
For the best noise and offset performance, the source
resistance R
S
needs to be less than 15 kΩ. The DC
resistances at the inputs are equal to minimize the
offset voltage caused by the input bias currents
(Section 4.2 “DC Offsets”). In this circuit, the DC gain
is 10 V/V, which will give a typical bandwidth of 19 kHz.
4.9.2 TWO OP AMP INSTRUMENTATION
AMPLIFIER
The two-op amp instrumentation amplifier shown in
Figure 4-10 serves the function of taking the difference
of two input voltages, level-shifting it and gaining it to
the output. This configuration is best suited for higher
gains (i.e., gain > 3 V/V). The reference voltage (V
REF
)
is typically at mid-supply (V
DD
/2) in a single-supply
environment.
FIGURE 4-10: Two-Op Amp
Instrumentation Amplifier.
The key specifications that make the MCP616/7/8/9
family appropriate for this application circuit are low
input bias current, low offset voltage and high common-
mode rejection.
Guard Ring V
IN
–V
IN
+ V
SS
MCP616
R
F
R
G
11.0 kΩ 100 kΩ
R
S
10 kΩ
V
DD
/2
V
S
V
OUT
V
OUT
V
1
V
2
–()1
R
1
R
2
------
2R
1
R
G
----------++
⎝⎠
⎜⎟
⎛⎞
V
REF
+=
R
2
R
1
MCP617
V
OUT
V
2
V
REF
½
R
1
R
2
V
1
R
G
MCP617
½