MCP601/1R/2/3/4 2.7V to 6.0V Single Supply CMOS Op Amps Features Description • • • • • • • • Single-Supply: 2.7V to 6.0V Rail-to-Rail Output Input Range Includes Ground Gain Bandwidth Product: 2.8 MHz (typical) Unity-Gain Stable Low Quiescent Current: 230 µA/amplifier (typical) Chip Select (CS): MCP603 only Temperature Ranges: - Industrial: -40°C to +85°C - Extended: -40°C to +125°C • Available in Single, Dual, and Quad The Microchip Technology Inc.
MCP601/1R/2/3/4 1.0 ELECTRICAL CHARACTERISTICS VDD – VSS ........................................................................7.0V † Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied.
MCP601/1R/2/3/4 AC CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, TA = +25°C, VDD = +2.7V to +5.5V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2, VL = VDD/2, and RL = 100 kΩ to VL, CL = 50 pF, and CS is tied low. (Refer to Figure 1-2 and Figure 1-3). Parameters Sym Min Typ Max Units GBWP — 2.8 — MHz PM — 50 — ° Conditions Frequency Response Gain Bandwidth Product Phase Margin G = +1 V/V Step Response Slew Rate SR — 2.3 — V/µs tsettle — 4.
MCP601/1R/2/3/4 TEMPERATURE CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, VDD = +2.7V to +5.5V and VSS = GND.
MCP601/1R/2/3/4 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
MCP601/1R/2/3/4 Note: Unless otherwise indicated, TA = +25°C, VDD = +2.7V to +5.5V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2, VL = VDD/2, RL = 100 kΩ to VL, CL = 50 pF and CS is tied low. 14% 18% 1200 Samples Percentage of Occurrences 12% 10% 8% 6% 4% 2% 0% 16% 14% 12% 10% 8% 6% 4% 2% 0% -2.0 -1.6 -1.2 -0.8 -0.4 0.0 0.4 0.8 1.2 1.6 2.0 Input Offset Voltage (mV) -8 -6 -4 -2 0 2 4 6 8 Input Offset Voltage Drift (µV/°C) 10 Input Offset Voltage Drift. 100 0.5 0.4 0.3 0.2 0.1 0.0 -0.1 -0.2 -0.3 -0.4 -0.
MCP601/1R/2/3/4 Note: Unless otherwise indicated, TA = +25°C, VDD = +2.7V to +5.5V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2, VL = VDD/2, RL = 100 kΩ to VL, CL = 50 pF and CS is tied low. 140 130 120 110 100 10k 100k 1.E+04 1.E+05 Frequency (Hz) 80 70 CMRR 60 50 40 30 VDD = 5.0V 10 1 100 10k 1M 10 1k 100k 1.E+00 1.E+01 1.E+02 1.E+03 1.E+04 1.E+05 1.E+06 Frequency (Hz) 1M 1.E+06 FIGURE 2-13: Channel-to-Channel Separation vs. Frequency. FIGURE 2-16: Frequency. CMRR, PSRR vs. 1000 VDD = 5.5V VCM = 4.
MCP601/1R/2/3/4 Note: Unless otherwise indicated, TA = +25°C, VDD = +2.7V to +5.5V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2, VL = VDD/2, RL = 100 kΩ to VL, CL = 50 pF and CS is tied low. 100 3.0 90 GBWP 2.5 80 2.0 70 1.5 PM, G = +1 60 1.0 50 0.5 40 0.0 100 1.E+02 1k 10k 1.E+03 1.E+04 Load Resistance (Ω) 130 DC Open-Loop Gain (dB) VDD = 5.0V Phase Margin, G = +1 (°) Gain Bandwidth Product (MHz) 3.5 RL = 25 kΩ 120 VDD = 5.5V 110 100 90 VDD = 2.7V 80 30 100k 1.
MCP601/1R/2/3/4 Note: Unless otherwise indicated, TA = +25°C, VDD = +2.7V to +5.5V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2, VL = VDD/2, RL = 100 kΩ to VL, CL = 50 pF and CS is tied low. Output Voltage (V) 4.5 4.0 5.0 VDD = 5.0V G = +1 VDD = 5.0V G = –1 4.5 Output Voltage (V) 5.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0.0 Time (1 µs/div) Time (1 µs/div) Large Signal Non-Inverting Output Voltage (20 mV/div) VDD = 5.0V G = +1 FIGURE 2-28: Response. Time (1 µs/div) 5.
MCP601/1R/2/3/4 Note: Unless otherwise indicated, TA = +25°C, VDD = +2.7V to +5.5V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2, VL = VDD/2, RL = 100 kΩ to VL, CL = 50 pF and CS is tied low. 0.7 6 VDD = 5.5V Input and Output Voltages (V) Chip Select Pin Current (µA) 0.8 0.6 0.5 0.4 0.3 0.2 0.1 0.0 2.5 Amplifier On VDD = 5.0V 2.0 1.5 CS Hi to Low CS Low to Hi 1.0 0.5 Amplifier Hi-Z 0.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 Chip Select Voltage (V) FIGURE 2-32: Internal Switch.
MCP601/1R/2/3/4 3.0 PIN DESCRIPTIONS Descriptions of the pins are listed in Table 3-1 (single op amps) and Table 3-2 (dual and quad op amps).
MCP601/1R/2/3/4 4.0 APPLICATIONS INFORMATION VDD The MCP601/1R/2/3/4 family of op amps are fabricated on Microchip’s state-of-the-art CMOS process. They are unity-gain stable and suitable for a wide range of general purpose applications. 4.1 D1 V1 R1 Inputs 4.1.1 PHASE REVERSAL R2 INPUT VOLTAGE AND CURRENT LIMITS The ESD protection on the inputs can be depicted as shown in Figure 4-1. This structure was chosen to protect the input transistors, and to minimize input bias current (IB).
MCP601/1R/2/3/4 Rail-to-Rail Output There are two specifications that describe the output swing capability of the MCP601/1R/2/3/4 family of op amps. The first specification (Maximum Output Voltage Swing) defines the absolute maximum swing that can be achieved under the specified load conditions. For instance, the output voltage swings to within 15 mV of the negative rail with a 25 kΩ load to VDD/2.
MCP601/1R/2/3/4 4.6 Unused Op Amps 2. An unused op amp in a quad package (MCP604) should be configured as shown in Figure 4-6. These circuits prevent the output from toggling and causing crosstalk. Circuits A sets the op amp at its minimum noise gain. The resistor divider produces any desired reference voltage within the output voltage range of the op amp; the op amp buffers that reference voltage. Circuit B uses the minimum number of components and operates as a comparator, but it may draw more current.
MCP601/1R/2/3/4 4.8.2 INSTRUMENTATION AMPLIFIER CIRCUITS Instrumentation amplifiers have a differential input that subtracts one input voltage from another and rejects common mode signals. These amplifiers also provide a single-ended output voltage. The three-op amp instrumentation amplifier is illustrated in Figure 4-10. One advantage of this approach is unitygain operation, while one disadvantage is that the common mode input range is reduced as R2/RG gets larger.
MCP601/1R/2/3/4 5.0 DESIGN AIDS Microchip provides the basic design tools needed for the MCP601/1R/2/3/4 family of op amps. 5.1 SPICE Macro Model The latest SPICE macro model for the MCP601/1R/2/ 3/4 op amps is available on the Microchip web site at www.microchip.com. This model is intended to be an initial design tool that works well in the op amp’s linear region of operation over the temperature range. See the model file for information on its capabilities.
MCP601/1R/2/3/4 6.0 PACKAGING INFORMATION 6.1 Package Marking Information 5-Lead SOT-23 (MCP601 and MCP601R only) I-Temp Code E-Temp Code MCP601 SANN SLNN MCP601R SJNN SMNN Device XXNN Example: 6-Lead SOT-23 (MCP603 only) Device XXNN Legend: XX...
MCP601/1R/2/3/4 Package Marking Information (Continued) 8-Lead PDIP (300 mil) MCP601 I/P256 0722 XXXXXXXX XXXXXNNN YYWW 8-Lead SOIC (150 mil) OR MCP601 E/P e3 256 0722 Example: MCP601 I/SN0722 256 XXXXXXXX XXXXYYWW NNN OR MCP601E SN e3 0722 256 Example: 8-Lead TSSOP DS21314G-page 18 Example: XXXX 601 XYWW I722 NNN 256 © 2007 Microchip Technology Inc.
MCP601/1R/2/3/4 Package Marking Information (Continued) Example: 14-Lead PDIP (300 mil) (MCP604) MCP604-I/P XXXXXXXXXXXXXX XXXXXXXXXXXXXX YYWWNNN 0722256 MCP604 E/P e3 0722256 OR 14-Lead SOIC (150 mil) (MCP604) Example: MCP604ISL XXXXXXXXXX XXXXXXXXXX YYWWNNN 0722256 MCP604 e3 E/SL^^ 0722256 OR 14-Lead TSSOP (MCP604) Example: XXXXXXXX YYWW 604E 0722 NNN 256 © 2007 Microchip Technology Inc.
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MCP601/1R/2/3/4 NOTES: DS21314G-page 28 © 2007 Microchip Technology Inc.
MCP601/1R/2/3/4 APPENDIX A: REVISION HISTORY Revision G (December 2007) • Updated Figure 2-15 and Figure 2-19. • Updated Table 3-1 and Table 3-2. • Updated notes to Section 1.0 “Electrical Characteristics”. • Expanded Analog Input Absolute Maximum Voltage Range (applies retroactively). • Expanded operating VDD to a maximum of 6.0V. • Added Figure 2-34. • Added Section 4.1.1 “Phase Reversal”, Section 4.1.2 “Input Voltage and Current Limits”, and Section 4.1.3 “Normal Operation”. • Corrected Section 6.
MCP601/1R/2/3/4 NOTES: DS21314G-page 30 © 2007 Microchip Technology Inc.
MCP601/1R/2/3/4 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO.
MCP601/1R/2/3/4 NOTES: DS21314G-page 32 © 2007 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature.
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