Datasheet

MCP4801/4811/4821
DS22244B-page 18 2010 Microchip Technology Inc.
4.0.2 DNL ACCURACY
A Differential Non-Linearity (DNL) error is the measure
of the variations in code widths from the ideal code
width. A DNL error of zero indicates that every code is
exactly 1 LSb wide.
FIGURE 4-2: Example for DNL Error.
4.0.3 OFFSET ERROR
Offset error is the deviation from zero voltage output
when the digital input code is zero.
4.0.4 GAIN ERROR
Gain error is the deviation from the ideal output,
V
REF
– 1 LSb, excluding the effects of offset error.
4.1 Circuit Descriptions
4.1.1 OUTPUT AMPLIFIER
The analog DAC output is buffered with a low-power,
precision CMOS amplifier. This amplifier provides low
offset voltage and low noise. The output stage enables
the device to operate with output voltages close to the
power supply rails. Refer to Section 1.0 “Electrical
Characteristics” for the analog output voltage range
and load conditions.
In addition to resistive load-driving capability, the
amplifier will also drive high capacitive loads without
oscillation. The amplifier’s strong output allows V
OUT
to
be used as a programmable voltage reference in a
system.
4.1.1.1 Programmable Gain Block
The rail-to-rail output amplifier has two configurable
gain options: a gain of 1x (<GA
> = 1) or a gain of 2x
(<GA
> = 0). The default setting is a gain of 2x. This
results in an ideal full-scale output of 0.000V to 4.096V
due to the internal reference (V
REF
= 2.048V).
4.1.2 VOLTAGE REFERENCE
The MCP4801/4811/4821 devices utilize internal
2.048V voltage reference. The voltage reference has a
low temperature coefficient and low noise
characteristics. Refer to Section 1.0 “Electrical Char-
acteristics” for the voltage reference specifications.
111
110
101
100
011
010
001
000
Digital
Input
Code
Actual
Transfer
Function
Ideal Transfer
Function
Narrow Code, <1 LSb
DAC Output
Wide Code, >1 LSb