Datasheet
2010 Microchip Technology Inc. DS22244B-page 19
MCP4801/4811/4821
4.1.3 POWER-ON RESET CIRCUIT
The internal Power-on Reset (POR) circuit monitors the
power supply voltage (V
DD
) during the device
operation. The circuit also ensures that the DAC
powers up with high output impedance (<SHDN> = 0,
typically 500 k. The devices will continue to have a
high-impedance output until a valid write command is
received, and the LDAC
pin meets the input low
threshold.
If the power supply voltage is less than the POR
threshold (V
POR
= 2.0V, typical), the DAC will be held
in the Reset state. It will remain in that state until
V
DD
>V
POR
and a subsequent write command is
received.
Figure 4-3 shows a typical power supply transient
pulse and the duration required to cause a reset to
occur, as well as the relationship between the duration
and trip voltage. A 0.1 µF decoupling capacitor,
mounted as close as possible to the V
DD
pin, can
provide additional transient immunity.
FIGURE 4-3: Typical Transient Response.
4.1.4 SHUTDOWN MODE
The user can shut down the device using a software
command (<SHDN
> = 0) or SHDN pin. During
shutdown mode, most of the internal circuits, including
the output amplifier, are turned off for power savings.
The internal reference is not affected by the shutdown
command. The serial interface also remains active,
allowing a write command to bring the device out of
Shutdown mode. There will be no analog output at the
V
OUT
pin, which is internally switched to a known resis-
tive load (500 ktypical. Figure 4-4 shows the analog
output stage during Shutdown mode.
The condition of the Power-on Reset circuit during
Shutdown is as follows:
a) Turned off if shutdown occurred from the SHDN
pin
b) Remains turned on if the shutdown occurred
through software
The device will remain in Shutdown mode until the
<SHDN> bit = 1 is latched into the device or SHDN pin
is changed to logic high. When the device is changed
from Shutdown to Active mode, the output settling time
takes < 10 µs, but greater than the standard active
mode settling time (4.5 µs).
FIGURE 4-4: Output Stage for Shutdown
Mode.
Transients above the curve
will cause a reset
Transients below the curve
will NOT cause a reset
5V
Time
Supply Voltages
Transient Duration
V
POR
V
DD
- V
POR
T
A
= +25°C
Transient Duration (µs)
10
8
6
4
2
0
12345
V
DD
- V
POR
(V)
500 k
Power-Down
Control Circuit
Resistive
Load
V
OUT
OP
Amp
Resistive String DAC