Datasheet

© 2010 Microchip Technology Inc. DS22187E-page 45
MCP4728
FIGURE 5-15: Read Command and Device Outputs.
Note 1: The 2nd - 4th bytes are the contents of the DAC Input Register and the 5th - 7th bytes are the EEPROM contents.
The device outputs sequentially from channel A to D.
POR Bit: 1 = Set (Device is powered on with V
DD
> V
POR
), 0 = Powered off state.
R/W
Device Code
ACK (MCP4728)
Start
S 1 1 0 0 A2 A1 A0 1 A
Read Command
Address Bits
2nd Byte
Channel A DAC Input Register
4th Byte
3rd Byte
Stop
RDY/
BSY
POR DAC1 DAC 0 0 A2 A1 A0 AV
REF
PD1 PD0 G
X
D11 D10 D9 D8 AD7D6D5D4D3D2D1D0A P
ACK (MASTER)
5th Byte
Channel A DAC EEPROM
7th Byte6th Byte
Stop
RDY/
BSY
POR DAC1 DAC 0 0 A2 A1 A0 AV
REF
PD1 PD0 G
X
D11 D10 D9 D8 AD7D6D5D4D3D2D1D0A P
2nd Byte
Channel B DAC Input Register
4th Byte3rd Byte
Stop
RDY/
BSY
POR DAC1 DAC 0 0 A2 A1 A0 AV
REF
PD1 PD0 G
X
D11 D10 D9 D8 AD7D6D5D4D3D2D1D0A P
5th Byte
Channel B DAC EEPROM
7th Byte6th Byte
Stop
RDY/
BSY
POR DAC1 DAC 0 0 A2 A1 A0 AV
REF
PD1 PD0 G
X
D11 D10 D9 D8 AD7D6D5D4D3D2D1D0A P
2nd Byte
Channel C DAC Input Register
4th Byte3rd Byte
Stop
RDY/
BSY
POR DAC1 DAC 0 0 A2 A1 A0 AV
REF
PD1 PD0 G
X
D11 D10 D9 D8 AD7D6D5D4D3D2D1D0A P
5th Byte
Channel C DAC EEPROM
7th Byte6th Byte
Stop
RDY/
BSY
POR DAC1 DAC 0 0 A2 A1 A0 AV
REF
PD1 PD0 G
X
D11 D10 D9 D8 AD7D6D5D4D3D2D1D0A P
2nd Byte
Channel D DAC Input Register
4th Byte3rd Byte
Stop
RDY/
BSY
POR DAC1 DAC 0 0 A2 A1 A0 AV
REF
PD1 PD0 G
X
D11 D10 D9 D8 AD7D6D5D4D3D2D1D0A P
5th Byte
Channel D DAC EEPROM
7th Byte6th Byte
Stop
RDY/
BSY
POR DAC1 DAC 0 0 A2 A1 A0 AV
REF
PD1 PD0 G
X
D11 D10 D9 D8 AD7D6D5D4D3D2D1D0A P
Repeat