Datasheet
MCP4728
DS22187E-page 4 © 2010 Microchip Technology Inc.
Power-on Reset
Threshold Voltage
V
POR
— 2.2 — V All circuits, including EEPROM, are
ready to operate.
Power-Up Ramp Rate V
RAMP
1——V/sNote 2, Note 4
DC Accuracy
Resolution n 12 — — Bits Code Change: 000h to FFFh
Integral Nonlinearity (INL)
Error
INL — ±2 ±13 LSB Note 5
DNL Error DNL -0.75 ±0.2 ±0.75 LSB Note 5
Offset Error V
OS
— 5 20 mV Code = 000h
See Figure 2-24
Offset Error Drift ΔV
OS
/°C — ±0.16 — ppm/°C -45°C to +25°C
— ±0.44 — ppm/°C +25°C to +125°C
Gain Error G
E
-1.25 0.4 +1.25 % of
FSR
Code = FFFh,
Offset error is not included.
Typical value is at room
temperature
See Figure 2-25
Gain Error Drift ΔG
E
/°C — -3 — ppm/°C
Internal Voltage Reference (V
REF
), (Note 3)
Internal Voltage Reference V
REF
2.007 2.048 2.089 V
Temperature Coefficient ΔV
REF
/°C — 125 — ppm/°C -40 to 0°C
— 0.25 — LSB/°C
— 45 — ppm/°C 0 to +125°C
— 0.09 — LSB/°C
Reference Output Noise E
NREF
— 290 — µV
p-p
Code = FFFh,
0.1 – 10 Hz, G
x
=1
Output Noise Density e
NREF
— 1.2 — Code = FFFh, 1 kHz, G
x
=1
— 1.0 — Code = FFFh, 10 kHz, G
x
=1
1/f Corner Frequency f
CORNER
— 400 — Hz
ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise indicated, all parameters apply at V
DD
= +2.7V to 5.5V, V
SS
=0V,
R
L
=5kΩ, C
L
= 100 pF, G
X
=1, T
A
= -40°C to +125°C. Typical values are at +25°C, V
IH
=V
DD
, V
IL
=V
SS.
Parameter Symbol Min Typical Max Units Conditions
Note 1: All digital input pins (SDA, SCL, LDAC
) are tied to “High”, Output pins are unloaded, code = 0 x 000.
2: The power-up ramp rate measures the rise of V
DD
over time.
3: This parameter is ensured by design and not 100% tested.
4: This parameter is ensured by characterization and not 100% tested.
5: Test code range: 100 - 4000 codes, V
REF
= V
DD
, V
DD
= 5.5V.
6: Time delay to settle to a new reference when switching from external to internal reference or vice versa.
7: This parameter is indirectly tested by Offset and Gain error testing.
8: Within 1/2 LSB of the final value when code changes from 1/4 of to 3/4 of full scale.
9: This time delay is measured from the falling edge of ACK pulse in I
2
C command to the beginning of V
OUT
.
This time delay is not included in the output settling time specification.
H
Z
μV