Datasheet

© 2010 Microchip Technology Inc. DS22187E-page 25
MCP4728
TABLE 4-3: CONFIGURATION BITS
Bit Name Functions
RDY/BSY This is a status indicator (flag) of EEPROM programming activity:
1 = EEPROM is not in programming mode
0 = EEPROM is in programming mode
Note: RDY/BSY
status can also be monitored at the RDY/BSY pin.
(A2, A1, A0) Device I
2
C address bits. See Section 5.3 “MCP4728 Device Addressing” for more details.
V
REF
Voltage Reference Selection bit:
0 = V
DD
1 = Internal voltage reference (2.048V)
Note: Internal voltage reference circuit is turned off if all channels select external reference
(V
REF
= V
DD)
.
DAC1, DAC0 DAC Channel Selection bits:
00 = Channel A
01 = Channel B
10 = Channel C
11 = Channel D
PD1, PD0 Power-Down selection bits:
00 = Normal Mode
01 = V
OUT
is loaded with 1 kΩ resistor to ground. Most of the channel circuits are powered off.
10 = V
OUT
is loaded with 100 kΩ resistor to ground. Most of the channel circuits are powered
off.
11 = V
OUT
is loaded with 500 kΩ resistor to ground. Most of the channel circuits are powered
off.
Note: See Tabl e 4- 7 and Figure 4-1 for more details.
G
X
Gain selection bit:
0 = x1 (gain of 1)
1 = x2 (gain of 2)
Note: Applicable only when internal V
REF
is selected. If V
REF
= V
DD
, the device uses a gain of 1
regardless of the gain selection bit setting.
UDAC DAC latch bit. Upload the selected DAC input register to its output register (V
OUT
):
0 = Upload. Output (V
OUT
) is updated.
1 = Do not upload.
Note: UDAC bit affects the selected channel only.