Datasheet

MCP4728
DS22187E-page 16 © 2010 Microchip Technology Inc.
Note: Unless otherwise indicated, T
A
= -40°C to +125°C, V
DD
= +5.0V, V
SS
= 0V, R
L
= 5 kΩ, C
L
= 100 pF.
FIGURE 2-31: Full Scale Settling Time
(V
REF
= Internal, V
DD
= 5V, UDAC = 1,
Gain = x1, Code Change: FFFh to 000h).
FIGURE 2-32: Half Scale Settling Time
(V
REF
= Internal, V
DD
= 5V, UDAC = 1,
Gain = x1, Code Change: 000h to 7FFh).
FIGURE 2-33: Exiting Power Down Mode
(Code: FFFh, V
REF
= Internal, V
DD
= 5V,
Gain = x1, for all Channels.).
FIGURE 2-34: Entering Power Down Mode
(Code: FFFh, V
REF
= Internal, V
DD
= 5V,
Gain = x1, PD1= PD0 = 1, No External Load).
FIGURE 2-35: Half Scale Settling Time
(V
REF
= Internal, V
DD
= 5V, UDAC = 1,
Gain = x1, Code Change: 7FFh to 000h).
FIGURE 2-36: Exiting Power Down Mode
(Code: FFFh, V
REF
= V
DD
, V
DD
= 5V, for all
Channels).
V
OUT
(2V/Div)
Time (2 µs/Div)
LDAC
V
OUT
(1V/Div)
LDAC
Time (2 µs/Div)
V
OUT
(1V/Div)
CLK
Time (5 µs/Div)
Td
ExPD
Last ACK CLK pulse
V
OUT
(1V/Div)
Time (10 µs/Div)
CLK
Discharging Time due to
internal pull-down resistor (500 kΩ)
Last ACK CLK pulse
V
OUT
(1V/Div)
LDAC
Time (2 µs/Div)
V
OUT
(2V/Div)
Time (5 µs/Div)
CLK
Last ACK CLK pulse
Td
ExPD