Datasheet

© 2011-2012 Microchip Technology Inc. DS22272C-page 5
MCP4706/4716/4726
Output Amplifier
Minimum Output
Voltage
V
OUT(MIN)
— 0.01 — V Output Amplifier’s minimum drive
Maximum Output
Voltage
V
OUT(MAX)
—V
DD
–
0.04
— V Output Amplifier’s maximum drive
Phase Margin PM — 66 — Degree
(°)
C
L
= 400 pF, R
L
= ∞
Slew Rate SR — 0.55 — V/µs
Short Circuit Current I
SC
71524mA
Settling Time t
SETTLING
—6—µsNote 3
Power-Down Output
Disable Time Delay
T
PDD
— 1 — µs PD1:PD0 = 00 -> 11, ‘10’, or ‘01’
started from falling edge SCL at end of
ACK bit.
V
OUT
= V
OUT
- 10 mV. V
OUT
not
connected.
Power-Down Output
Enable Time Delay
T
PDE
— 10.5 — µs PD1:PD0 = 11, ‘10’, or ‘01’ -> “00”
started from falling edge SCL at end of
ACK bit.
Volatile DAC Register = FFh,
V
OUT
=10mV. V
OUT
not connected.
External Reference (V
REF
) (Note 1)
Input Range V
REF
0.04 — V
DD
-
0.04
V Buffered mode
0—V
DD
V Unbuffered mode
Input Impedance R
VREF
— 210 — kΩ Unbuffered mode
Input Capacitance C_
REF — 29 — pF Unbuffered mode
-3 dB Bandwidth — 86.5 — kHz V
REF
= 2.048V ± 0.1V,
V
REF1
:V
REF0
= 10, G = 0
—67.7— kHzV
REF
= 2.048V ± 0.1V,
V
REF1
:V
REF0
= 10, G = 1
Total Harmonic
Distortion
THD — -73 — dB V
REF
= 2.048V ± 0.1V,
V
REF1
:V
REF0
= 10, G = 0,
Frequency = 1 kHz
Dynamic Performance (Note 1)
Major Code Transition
Glitch
— 45 — nV-s 1 LSb change around major carry
(800h to 7FFh)
Digital Feedthrough — <10 — nV-s
ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise indicated, V
DD
= 2.7V to 5.5V, V
SS
= 0V, RL = 5 kΩ from V
OUT
to GND, C
L
= 100 pF,
T
A
= -40°C to +125°C. Typical values at +25°C.
Parameters Symbol Min Typical Max Units Conditions
Note 1: This parameter is ensured by design and is not 100% tested.
2: This Gain error does not include Offset error. See Section 1.0 “Electrical Characteristics” for more details in plots.
3: Within 1/2 LSb of final value when code changes from 1/4 to 3/4 of FSR. (Example: 400h to C00h in 12-bit device).
4: The power-up ramp rate affects on uploading the EEPROM contents to the DAC register. It measures the rise of V
DD
over time.
5: This parameter is ensured by characterization, and not 100% tested.
6: The PD1:PD0 = 10, and ‘11’ configurations should have the same current.
7: V
DD
= V
REF
= 5.5V.