Datasheet

© 2011-2012 Microchip Technology Inc. DS22272C-page 7
MCP4706/4716/4726
1.1 I
2
C Mode Timing Waveforms and Requirements
FIGURE 1-1: Power-On and Brown-Out Reset Waveforms.
FIGURE 1-2: I
2
C Power-Down Command Timing.
TABLE 1-1: RESET TIMING
Timing Characteristics
Standard Operating Conditions (unless otherwise specified)
Operating Temperature -40°C ≤ T
A
≤ +125°C (extended)
All parameters apply across the specified operating ranges unless noted.
V
DD
= +2.7V to 5.5V, 5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ devices.
Typical specifications represent values for V
DD
= 5.5V, T
A
= +25°C.
Parameters Sym Min Typ Max Units Conditions
Power-Up Reset
Delay
t
PORD
— 60 — µs Monitor ACK bit response to ensure device
responds to command.
Brown-Out Reset
Delay
t
BORD
—1—µsV
DD
transitions from V
DD(MIN)
→ > V
POR
V
OUT
driven to V
OUT
disabled
Power-Down
Disable Time Delay
T
PDD
—2.5— µsV
DD
= 5V
PD1:PD0 → 00 (from ‘01’, ‘10’, or ‘11’),
from falling edge SCL at end of ACK bit.
—5—µsV
DD
= 3V
PD1:PD0 → 00 (from ‘01’, ‘10’, or ‘11’),
from falling edge SCL at end of ACK bit.
Power-Down Enable
Time Delay
T
PDE
— 10.5 — µs PD1:PD0 → 01, ‘10’, or ‘11’ (from ‘00’),
from falling edge SCL at end of ACK bit.
V
DD
SDA
t
PORD
t
BORD
V
OUT
SCL V
IH
V
IH
V
POR
(V
BOR
)
V
OUT
pulled down by internal
500 kΩ (typical) resistor
I
2
C™ Interface is operational
SDA
SCL
ACK
Stop Start
ACK
V
OUT
t
PDE
t
PDD