Datasheet

MCP434X/436X
DS22233A-page 64 © 2009 Microchip Technology Inc.
Figure 8-8 shows possible layout implementations for
an application to support the quad and dual options on
the same PCB.
FIGURE 8-8: Layout to support Quad and
Dual Devices.
8.4.2.3 PCB Area Requirements
In some applications, PCB area is a criteria for device
selection. Table 8-2 shows the package dimensions
and area for the different package options. The table
also shows the relative area factor compared to the
smallest area. For space critical applications, the QFN
package would be the suggested package.
TABLE 8-2: PACKAGE FOOTPRINT
(1)
8.4.3 RESISTOR TEMPCO
Characterization curves of the resistor temperature
coefficient (Tempco) are shown in Figure 2-8,
Figure 2-19, Figure 2-29, and Figure 2-39.
These curves show that the resistor network is
designed to correct for the change in resistance as
temperature increases. This technique reduces the
end to end change is R
AB
resistance.
8.4.4 HIGH VOLTAGE TOLERANT PINS
High Voltage support (V
IHH
) on the Serial Interface pins
supports two features. These are:
• In-Circuit Accommodation of split rail applications
and power supply sync issues
• User configuration of the Non-Volatile EEPROM,
Write Protect, and WiperLock feature
Potentiometers Devices
Rheostat Devices
MCP43X1
MCP42X1
MCP43X2
MCP42X2
Package Package Footprint
Pins
Type Code
Dimensions
(mm)
Area (mm
2
)
Relative Area
XY
14 TSSOP ST 5.10 6.40 32.64 2.04
20
QFN ML 4.00 4.00 16.00 1
TSSOP ST 6.60 6.40 42.24 2.64
Note 1: Does not include recommended land
pattern dimensions.
Note: In many applications, the High Voltage will
only be present at the manufacturing
stage so as to “lock” the Non-Volatile wiper
value (after calibration) and the contents
of the EEPROM. This ensures that since
High Voltage is not present under normal
operating conditions, these values can not
be modified.