Datasheet

MCP41XXX/42XXX
DS11195C-page 4 2003 Microchip Technology Inc.
DC CHARACTERISTICS: 100 k VERSION
Electrical Characteristics: Unless otherwise indicated, V
DD
= +2.7V to 5.5V, T
A
= -40°C to +85°C (TSSOP devices are only specified at +25°C and
+85°C). Typical specifications represent values for V
DD
= 5V, V
SS
= 0V, V
B
= 0V, T
A
= +25°C.
Parameters Sym Min Typ Max Units Conditions
Rheostat Mode
Nominal Resistance R 70 100 130 k T
A
= +25°C (Note 1)
Rheostat Differential Non-Linearity R-DNL -1 ±1/4 +1 LSB Note 2
Rheostat Integral Non-Linearity R-INL -1 ±1/4 +1 LSB Note 2
Rheostat Tempco R
AB
/T 800 ppm/°C
Wiper Resistance R
W
125 175 V
DD
= 5.5V, I
W
= 1 mA, code 00h
R
W
175 250 V
DD
= 2.7V, I
W
= 1 mA, code 00h
Wiper Current I
W
-1 +1 mA
Nominal Resistance Match R/R 0.2 1 % MCP42010 only, P0 to P1;T
A
= +25°C
Potentiometer Divider
Resolution N 8 Bits
Monotonicity N 8 Bits
Differential Non-Linearity DNL -1 ±1/4 +1 LSB Note 3
Integral Non-Linearity INL -1 ±1/4 +1 LSB Note 3
Voltage Divider Tempco V
W
/T 1 ppm/°C Code 80h
Full-Scale Error V
WFSE
-1 -0.25 0 LSB Code FFh, V
DD
= 5V, see Figure 2-25
V
WFSE
-1 -0.35 0 LSB Code FFh, V
DD
= 3V, see Figure 2-25
Zero-Scale Error V
WZSE
0 +0.25 +1 LSB Code 00h, V
DD
= 5V, see Figure 2-25
V
WZSE
0 +0.35 +1 LSB Code 00h, V
DD
= 3V, see Figure 2-25
Resistor Terminals
Voltage Range V
A,B,W
0—V
DD
Note 4
Capacitance (C
A
or C
B
) 11 pF f =1 MHz, Code = 80h, see Figure 2-30
Capacitance C
W
5.6 pF f =1 MHz, Code = 80h, see Figure 2-30
Dynamic Characteristics (All dynamic characteristics use V
DD
= 5V.)
Bandwidth -3dB BW 145 MHz V
B
= 0V, Measured at Code 80h,
Output Load = 30
P
F
Settling Time t
S
—18—µSV
A
= V
DD
,V
B
= 0V, ±1% Error Band, Transition
from Code 00h to Code 80h, Output Load = 30 pF
Resistor Noise Voltage e
NWB
—29—nV/Hz V
A
= Open, Code 80h, f =1 kHz
Crosstalk C
T
—-95—dBV
A
= V
DD
, V
B
= 0V (Note 5)
Digital Inputs/Outputs (CS
, SCK, SI, SO) See Figure 2-12 for RS and SHDN pin operation.
Schmitt Trigger High-Level Input Voltage V
IH
0.7V
DD
——V
Schmitt Trigger Low-Level Input Voltage V
IL
0.3V
DD
V
Hysteresis of Schmitt Trigger Inputs V
HYS
—0.05V
DD
Low-Level Output Voltage V
OL
0.40 V I
OL
= 2.1 mA, V
DD
= 5V
High-Level Output Voltage V
OH
V
DD
- 0.5 V I
OH
= -400 µA, V
DD
= 5V
Input Leakage Current I
LI
-1 +1 µA CS = V
DD
, V
IN
= V
SS
or V
DD
, includes V
A
SHDN=0
Pin Capacitance (All inputs/outputs) C
IN
, C
OUT
—10—pFV
DD
= 5.0V, T
A
= +25°C, f
c
= 1 MHz
Power Requirements
Operating Voltage Range V
DD
2.7 5.5 V
Supply Current, Active I
DDA
340 500 µA V
DD
= 5.5V, CS = V
SS
, f
SCK
= 10 MHz,
SO = Open, Code FFh (Note 6)
Supply Current, Static I
DDS
—0.01 1 µACS, SHDN, RS = V
DD
= 5.5V, SO = Open (Note 6)
Power Supply Sensitivity PSS 0.0015 0.0035 %/% V
DD
= 4.5V - 5.5V, V
A
= 4.5V, Code 80h
PSS 0.0015 0.0035 %/% V
DD
= 2.7V - 3.3V, V
A
= 2.7V, Code 80h
Note 1: V
AB
= V
DD
, no connection on wiper.
2: Rheostat position non-linearity R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum
resistance wiper positions. R-DNL measures the relative step change from the ideal between successive tap positions. I
W
= 50 µA for
V
DD
= 3V and I
W
= 400 µA for V
DD
= 5V for 10 k version. See Figure 2-26 for test circuit.
3: INL and DNL are measured at V
W
with the device configured in the voltage divider or potentiometer mode. V
A
= V
DD
and V
B
= 0V. DNL
specification limits of ±1 LSB max are specified monotonic operating conditions. See Figure 2-25 for test circuit.
4: Resistor terminals A,B and W have no restrictions on polarity with respect to each other. Full-scale and zero-scale error were measured
using Figure 2-25.
5: Measured at V
W
pin where the voltage on the adjacent V
W
pin is swinging full-scale.
6: Supply current is independent of current through the potentiometers.