Datasheet

© 2008 Microchip Technology Inc. DS22060B-page 11
MCP413X/415X/423X/425X
1.1 SPI Mode Timing Waveforms and Requirements
FIGURE 1-1: SPI Timing Waveform (Mode = 11).
TABLE 1-1: SPI REQUIREMENTS (MODE =
11)
# Characteristic Symbol Min Max Units Conditions
SCK Input Frequency F
SCK
—10MHzV
DD
= 2.7V to 5.5V
—1MHzV
DD
= 1.8V to 2.7V
70 CS
Active (V
IL
or V
IHH
) to SCK↑ input TcsA2scH 60 — ns
71 SCK input high time TscH 45 — ns V
DD
= 2.7V to 5.5V
500 — ns V
DD
= 1.8V to 2.7V
72 SCK input low time TscL 45 — ns V
DD
= 2.7V to 5.5V
500 — ns V
DD
= 1.8V to 2.7V
73 Setup time of SDI input to SCK↑ edge T
DIV2scH 10 — ns
74 Hold time of SDI input from SCK↑ edge TscH2
DIL20—ns
77 CS Inactive (V
IH
) to SDO output hi-impedance TcsH2DOZ — 50 ns Note 1
80 SDO data output valid after SCK↓ edge TscL2
DOV — 70 ns V
DD
= 2.7V to 5.5V
170 ns V
DD
= 1.8V to 2.7V
83 CS
Inactive (V
IH
) after SCK↑ edge TscH2csI 100 — ns V
DD
= 2.7V to 5.5V
1msV
DD
= 1.8V to 2.7V
84 Hold time of CS
Inactive (V
IH
) to
CS Active (V
IL
or V
IHH
)
TcsA2csI 50 — ns
Note 1: This specification by design.
CS
SCK
SDO
SDI
70
71
72
73
74
75, 76
77
78
79
80
MSb LSb
BIT6 - - - - - -1
MSb IN BIT6 - - - -1 LSb IN
83
84
V
IH
V
IL
V
IHH
V
IH