Datasheet

MCP413X/415X/423X/425X
DS22060B-page 60 © 2008 Microchip Technology Inc.
8.2 Techniques to force the CS pin to
V
IHH
The circuit in Figure 8-3 shows a method using the
TC1240A doubling charge pump. When the SHDN pin
is high, the TC1240A is off, and the level on the CS
pin
is controlled by the PIC® microcontrollers (MCUs) IO2
pin.
When the SHDN pin is low, the TC1240A is on and the
V
OUT
voltage is 2 * V
DD
. The resistor R
1
allows the CS
pin to go higher than the voltage such that the PIC
MCU’s IO2 pin “clamps” at approximately V
DD.
FIGURE 8-3: Using the TC1240A to
generate the V
IHH
voltage.
The circuit in Figure 8-4 shows the method used on the
MCP402X Non-volatile Digital Potentiometer Evalua-
tion Board (Part Number: MCP402XEV). This method
requires that the system voltage be approximately 5V.
This ensures that when the PIC10F206 enters a
brown-out condition, there is an insufficient voltage
level on the CS
pin to change the stored value of the
wiper. The MCP402X Non-volatile Digital
Potentiometer Evaluation Board User’s Guide
(DS51546) contains a complete schematic.
GP0 is a general purpose I/O pin, while GP2 can either
be a general purpose I/O pin or it can output the internal
clock.
For the serial commands, configure the GP2 pin as an
input (high-impedance). The output state of the GP0
pin will determine the voltage on the CS
pin (V
IL
or V
IH
).
For high-voltage serial commands, force the GP0
output pin to output a high level (V
OH
) and configure the
GP2 pin to output the internal clock. This will form a
charge pump and increase the voltage on the CS
pin
(when the system voltage is approximately 5V).
FIGURE 8-4: MCP4XXX Non-Volatile
Digital Potentiometer Evaluation Board
(MCP402XEV) implementation to generate the
V
IHH
voltage.
8.3 Using Shutdown Modes
Figure 8-5 shows a possible application circuit where
the independent terminals could be used.
Disconnecting the wiper allows the transistor input to
be taken to the Bias voltage level (disconnecting A and
or B may be desired to reduce system current).
Disconnecting Terminal A modifies the transistor input
by the R
BW
rheostat value to the Common B.
Disconnecting Terminal B modifies the transistor input
by the R
AW
rheostat value to the Common A. The
Common A and Common B connections could be
connected to V
DD
and V
SS
.
FIGURE 8-5: Example Application Circuit
using Terminal Disconnects.
CS
PIC MCU
MCP402X
R
1
IO1
IO2
C
2
TC1240A
V
IN
SHDN
C+
C-
V
OUT
C
1
CS
PIC10F206
MCP4XXX
R
1
GP0
GP2
C
2
C
1
Balance Bias
W
B
Input
Input
To ba se
of Transistor
(or Amplifier)
A
Common B
Common A