Datasheet

© 2006 Microchip Technology Inc. DS21945E-page 47
MCP4021/2/3/4
7.0 DESIGN CONSIDERATIONS
In the design of a system with the MCP402X devices,
the following considerations should be taken into
account:
• The Power Supply
• The Layout
7.1 Power Supply Considerations
The typical application will require a bypass capacitor
in order to filter high-frequency noise, which can be
induced onto the power supply's traces. The bypass
capacitor helps to minimize the effect of these noise
sources on signal integrity. Figure 7-1 illustrates an
appropriate bypass strategy.
In this example, the recommended bypass capacitor
value is 0.1 µF. This capacitor should be placed as
close (within 4 mm) to the device power pin (V
DD
) as
possible.
The power source supplying these devices should be
as clean as possible. If the application circuit has
separate digital and analog power supplies, V
DD
and
V
SS
should reside on the analog plane.
FIGURE 7-1: Typical Microcontroller
Connections.
7.2 Layout Considerations
Inductively-coupled AC transients and digital switching
noise can degrade the input and output signal integrity,
potentially masking the MCP402X’s performance.
Careful board layout will minimize these effects and
increase the Signal-to-Noise Ratio (SNR). Bench
testing has shown that a multi-layer board utilizing a
low-inductance ground plane, isolated inputs, isolated
outputs and proper decoupling are critical to achieving
the performance that the silicon is capable of providing.
Particularly harsh environments may require shielding
of critical signals.
If low noise is desired, breadboards and wire-wrapped
boards are not recommended.
V
DD
V
DD
V
SS
V
SS
MCP4021/2/3/4
0.1 µF
PIC
®
Microcontroller
0.1 µF
U/D
CS
W
B
A