Datasheet

© 2012 Microchip Technology Inc. DS22286A-page 47
MCP3911
FIGURE 6-6: Typical Continuous Read Communication (SPI Mode 0,0).
FIGURE 6-7: Typical Continuous Read Communication (SPI Mode 1,1).
CH0 ADC
ADDR/R
CS
SCK
SDI
CH0 ADC
Upper byte
SDO
CH0 ADC
Middle byte
CH0 ADC
Lower byte
DR
CH1 ADC
Upper byte
CH1 ADC
Middle byte
CH1 ADC
Lower byte
CH0 ADC Upper byte
New ADC data
CH0 ADC
Middle byte
CH0 ADC
Lower byte
CH1 ADC
Upper byte
CH1 ADC
Middle byte
CH1 ADC
Lower byte
These bytes are not present when WIDTH=0 (16-bit mode)
HiZ
CH0 ADC MSB
Old ADC data
CH0 ADC Upper byte
Old ADC data
CH0 ADC Old MSB data Previous MSB data present on SDO until the data ready pulse updates the
SDO with the new incoming MSB dta
data
CH0 ADC
ADDR/R
CS
SCK
SDI
CH0 ADC
Upper byte
SDO
CH0 ADC
Middle byte
CH0 ADC
Lower byte
DR
CH1 ADC
Upper byte
CH1 ADC
Middle byte
CH1 ADC Lower byte
CH0 ADC
Upper byte
CH0 ADC
Middle byte
CH0 ADC
Lower byte
CH1 ADC
Upper byte
CH1 ADC
Middle byte
CH1 ADC Lower byte
These bytes are not present when WIDTH=0 (16-bit mode)
HiZ