Datasheet

 2006-2012 Microchip Technology Inc. DS22025C-page 31
MCP3909
FIGURE 5-8: Dual Channel Output Mode SPI Communication using 8-bit segments
(Mode 0,1: SCK idles low).
1 2 3 4 5 6 7 8 9 10111213141516
D14 D13 D12 D11
D7 D6 D5
D4 D3 D2 D1 D0
MCU latches data from
Data is clocked out
on rising edges
Device on falling edges of SCK
Don’t Care
D7 D6 D5 D4 D3 D2 D1 D0D11 D10 D9 D8
MCU Transmit Buffer
MCU Receive Buffer
CH0 Data is stored into the MCU
receive register after transmission
of the first 8 bits
CH0 Data is stored into the MCU
receive register after transmission
of the second 8 bits
D15
D10 D9 D8
D15 D14 D13 D12
17 18
19
20 21 22 23 24 25 26 27 28 29 30 31 32
MCU latches data from
Data is clocked out
on rising edges
Device on falling edges of SCK
Don’t Care
MCU Transmit Buffer
MCU Receive Buffer
CH1 Data is stored into the MCU
receive register after transmission
of the third 8 bits
CH1 Data is stored into the MCU
receive register after transmission
of the fourth 8 bits
CHANNEL 0
CHANNEL 1
D14 D13 D12 D11 D7 D6 D5 D4 D3 D2 D1 D0D15 D10 D9 D8
F1 / SDI
F2 / SCK
NEG / SDO
F0 / CS
F1 / SDI
F2 / SCK
NEG / SDO
F0 / CS
X XXXXXXXXXXXXXXX
X XXXXXXXXXXXXXXX
D7 D6 D5 D4 D3 D2 D1 D0D11 D10 D9 D8D15 D14 D13 D12