Datasheet

 2006-2012 Microchip Technology Inc. DS22025C-page 29
MCP3909
5.7 Using the MCP3909 with
Microcontroller (MCU) SPI Ports
With microcontroller SPI ports, it is required to send
groups of eight bits. It is also required that the micro-
controller SPI port be configured to clock out data on
the falling edge of clock and latch data in on the rising
edge, or vice versa depending on the mode.
5.7.1 SPI MODE DEFINITIONS
The following table represents the standard SPI mode
terminology, the respective PIC bit settings, and a
description of compatibility for the MCP3909 device.
The MCP3909 works in SPI mode 0,1 mode, that is the
data is clocked out of the part on the rising edge and
clocked in on the falling edge of SCK.
TABLE 5-4: SPI MODE COMPATIBILITY
Standard SPI
Mode
Terminology
PIC Control Bits
State
MCP3909
Compatibility
Description
CKP CKE
0,0 0 1 — Idle state for clock is low level, transmit (from PIC)
occurs from active to idle clock state
0,1 0 0
√
Idle state for clock is low level, transmit (from PIC)
occurs from idle to active clock state
1,0 1 1 — Idle state for clock is high level, transmit (from PIC)
occurs from active to idle clock state
1,1 1 0 — Idle state for clock is high level, transmit (from PIC)
occurs from idle to active clock state