Datasheet

MCP3909
DS22025C-page 26  2006-2012 Microchip Technology Inc.
5.3 Multiplier Output Mode
Multiplier mode allows the user to retrieve the output
of the multiplier on the MCP3909 device. Data is pre-
sented in a 20 bit (19 bit + sign) protocol, MSB first. A
data ready flag (DR) is output for every MCLK/256
clock cycles and a new multiplier output value is ready.
If the multiplier value is not clocked out of the device it
will be over-written. Data is clocked out on the rising
edge of SCK.
EQUATION 5-1:
FIGURE 5-4: Multiplier Output Mode.
TABLE 5-2: MULTIPLIER OUTPUT MODE CODING
Binary Decimal
0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 +524287
0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 +524286
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 -1
1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 -524287
1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -524288
Multiplier Code
CH0
+
CH0
–
–CH1
+
CH1
–
–
V
REF
2
---------------------------------------------------------------------------------- 524288 8.06 G  =
F1 / SDI
D3 D2 D1 D0
Hi-z
Hi-z
D16D17
1
23
17 18 19 20
Hi-z
X 20
X 20
4
DR
0
D18D19
F2 / SCK
NEG / SDO
F0 / CS
SIGN MSB LSB