MCP3909 Energy Metering IC with SPI Interface and Active Power Pulse Output Features Description • Supports IEC 62053 International Energy Metering Specification • Digital Waveform Data Access Through SPI Interface - 16-bit Dual ADC Output Data Words - 20-bit Multiplier Output Data Word • Dual Functionality Pins Support Serial Interface Access and Simultaneous Active Power Pulse Output • Two 16-bit Second Order Delta-sigma Analogto-Digital Converters (ADCs) with Multi-bit DAC - 81 dB SINAD (typical) on Bo
MCP3909 Functional Block Diagram HPF G0 G1 F2/SCK F1/SDI F0/CS NEG/SDO CH0+ + PGA – CH0- 16-bit Multi-level ADC 4 k 16 HPF1 16 Serial Control And Output Buffers REFIN/OUT 2.4V Reference CH1+ + CH1- – 16 16-bit Multi-level ADC SPI Interface HFOUT FOUT0 FOUT1 20 X DS22025C-page 2 MCLR 16 HPF1 Clock Sub-system OSC1 OSC2 Dual Functionality Pin Control LPF1 Active Power DTF conversion Stepper Motor Output Drive for Active Power 2006-2012 Microchip Technology Inc.
MCP3909 1.0 ELECTRICAL CHARACTERISTICS † Notice: Stresses above those listed under "Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Absolute Maximum Ratings † VDD...........................................................
MCP3909 ELECTRICAL CHARACTERISTICS (CONTINUED) Electrical Specifications: Unless otherwise indicated, all parameters apply at AVDD = DVDD = 4.5V to 5.5V, Internal VREF, HPF turned on (AC mode), AGND, DGND = 0V, MCLK = 3.58 MHz; TA = -40°C to +85°C. Parameter Sym Min Typ. Max Units VOS — 2 5 mV — 0.5 — — 2.
MCP3909 TEMPERATURE CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, VDD = 4.5V to 5.5V, AGND, DGND = 0V.
MCP3909 TIMING CHARACTERISTICS (CONTINUED) Electrical Specifications: Unless otherwise indicated, all parameters apply at AVDD = DVDD = 4.5V to 5.5V, AGND, DGND = 0V, MCLK = 3.58 MHz; TA = -40°C to +85°C.
MCP3909 tFP tFW FOUT0 tFS tFS2 FOUT1 tHW HFOUT tHP NEG FIGURE 1-1: Output Timings for Active Power Pulse Outputs and Negative Power Pin. CS tSUCS tCLK tHI tLO CLK tSU tHD SDI tDO SDO FIGURE 1-2: Hi-z tR tF tDIS Serial Interface Timings showing Output, Rise, Hold, and CS Times. 2006-2012 Microchip Technology Inc.
MCP3909 VDD V –V DD OL R = -----------------------------------IOL SPI Data Output Pin FIGURE 1-3: DS22025C-page 8 180 pF VOH R = -----------------I OH SPI Output Pin Loading Circuit During SPI Testing. 2006-2012 Microchip Technology Inc.
MCP3909 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. 1 0.8 0.6 0.4 0.2 +25°C 0 -0.2 -0.4 -0.6 -0.
MCP3909 1 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -1 0.0001 Measurement Error (%) Measurement Error (%) Note: Unless otherwise specified, DVDD, AVDD = 5V; AGND, DGND = 0V; VREF = Internal, HPF = 1 (AC mode), MCLK = 3.58 MHz, CH1 input = 660 mVP-P at 50 Hz, CH0 amplitude sweeps at 50 Hz. +85°C +25°C - 40°C 0.0010 0.0100 0.1000 1.0000 CH0 Vp-p Amplitude (V) FIGURE 2-7: Active Power Measurement Error (Gain = 1, PF = 1). 1 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -1 0.0001 +25°C; PF = 1 +25°C; PF = 0.
MCP3909 Note: Unless otherwise specified, DVDD, AVDD = 5V; AGND, DGND = 0V; VREF = Internal, HPF = 1 (AC mode), MCLK = 3.58 MHz, CH1 input = 660 mVP-P at 50 Hz, CH0 amplitude sweeps at 50 Hz. 1200 3000 1000 O cOccurance currence 2000 1500 1000 800 16384 Samples Mean = -1.65 mV Std. Dev = 16.99 µV 600 400 200 500 FIGURE 2-13: Channel 0 Offset Error (DC Mode, HPF off, G = 1, PF = 1). 600 2000 500 O cOccurance currence O cOccurance currence -1.59 -1.60 -1.61 -1.
MCP3909 Note: Unless otherwise specified, DVDD, AVDD = 5V; AGND, DGND = 0V; VREF = Internal, HPF = 1 (AC mode), MCLK = 3.58 MHz, CH1 input = 660 mVP-P at 50 Hz, CH0 amplitude sweeps at 50 Hz. 0.3 0.2 Measurement Error (%) Measurement Error (%) 0.3 0.25 VDD=5.0V 0.15 0.1 VDD=4.5V 0.05 VDD=5.25V 0 VDD=4.75V -0.05 VDD=5.5V -0.1 -0.15 0.0001 0.0010 0.0100 0.1000 0.2 0.1 -0.2 FIGURE 2-17: Active Power Measurement Error over VDD , Internal VREF (G = 16, PF = 1).
MCP3909 +85°C -40°C 0.0100 0.1000 1 0.8 0.6 0.4 0.2 0 -0.2 - 40°C -0.4 -0.6 -0.8 -1 0.0000 1.0000 +85°C -40°C 0.0010 0.0100 0.1000 1 0.8 0.6 0.4 0.2 +25°C 0 -0.2 -0.4 -0.6 -0.8 -1 0.0000 +85°C -40°C 0.0010 0.0100 0.1000 CH1 Vp-p Amplitude (V) FIGURE 2-25: Active Power Measurement Error with External VREF (G = 8, PF = 0.5). 2006-2012 Microchip Technology Inc. 0.0100 0.1000 -40°C +85°C 0.0001 0.0010 0.0100 0.
MCP3909 100 100 90 90 80 80 SINAD (dBFS) 70 70 60 60 50 50 40 40 30 30 SINAD (dB) 20 20 10 10 0 0 0.000010 0.000100 0.001000 0.010000 0.100000 CH0 Vp-p Amplitude (V) CH0 Vp-p Amplitude (V) SINAD (dBFS) SINAD (dB) 0.0001 0.001 0.01 0.1 CH0 Vp-p Amplitude (V) FIGURE 2-30: Signal-to-Noise and Distortion Ratio vs. Input Signal Amplitude (G = 8). DS22025C-page 14 0 -20 Amplitude (dB) 100 90 80 70 60 50 40 30 20 10 0 FIGURE 2-31: Signal-to-Noise and Distortion Ratio vs.
MCP3909 3.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 3-1. TABLE 3-1: MCP3909 PIN FUNCTION TABLE Symbol Description SSOP 3.
MCP3909 3.3 Analog VDD (AVDD) AVDD is the power supply pin for the analog circuitry within the MCP3909. This pin requires appropriate bypass capacitors and should be maintained to 5V ±10% for specified operation. Refer to Section 6.0 “Applications Information”. 3.4 Current Channel (CH0-, CH0+) CH0- and CH0+ are the fully differential analog voltage input channels for the current measurement, containing a PGA for small-signal input, such as shunt current sensing.
MCP3909 3.13 Oscillator (OSC1, OSC2) OSC1 and OSC2 provide the master clock for the device. A resonant crystal or clock source with a similar sinusoidal waveform must be placed across these pins to ensure proper operation. The typical clock frequency specified is 3.579545 MHz. However, the clock frequency can be within the range of 1 MHz to 4 MHz without disturbing measurement error. Appropriate load capacitance should be connected to these pins for proper operation.
MCP3909 4.0 DEVICE OVERVIEW 4.1 Active Power The instantaneous power signal contains the active power information; it is the DC component of the instantaneous power. The averaging technique can be used with both sinusoidal and non-sinusoidal waveforms, as well as for all power factors. The instantaneous power is thus low-pass filtered in order to produce the instantaneous real-power signal.
MCP3909 Analog Inputs The MCP3909 analog inputs can be connected directly to the current and voltage transducers (such as shunts or current transformers). Each input pin is protected by specialized ESD structures that are certified to pass 5 kV HBM and 500V MM contact charge. These structures also allow up to ±6V continuous voltage to be present at their inputs without the risk of permanent damage. Both channels have fully differential voltage inputs for better noise performance.
MCP3909 Ultra-Low Drift VREF The MCP3909 contains an internal voltage reference source specially designed to minimize drift over temperature. This internal VREF supplies reference voltage to both current and voltage channels ADCs. The typical value of this voltage reference is 2.4V ±100 mV. The internal reference has a very low typical temperature coefficient of ±15 ppm/°C, allowing the output frequencies to have minimal variation with respect to temperature since they are proportional to (1/VREF)².
MCP3909 The multiplier output gives the product of the two high-pass filtered channels, corresponding to instantaneous real power. Multiplying two sine wave signals by the same ω frequency gives a DC component and a 2ω component. The instantaneous power signal contains the real power of its DC component, while also containing 2ω components coming from the line frequency multiplication.
MCP3909 4.8 Active Power FOUT0/1 and HFOUT Output Frequencies The thresholds for the accumulated energy are different for FOUT0/1 and HFOUT (i.e., they have different transfer functions). The FOUT0/1 allowed output frequencies are quite low in order to allow superior integration time (see Section 4.7 “Active Power LowPass Filter and DTF Converter”). The FOUT0/1 output frequency can be calculated with the following equation: EQUATION 4-1: Where: FOUT FREQUENCY OUTPUT EQUATION 8.
MCP3909 EQUATION 4-2: ACTIVE POWER HFOUT FREQUENCY OUTPUT EQUATION 8.06 V 0 V 1 G HF C HF OUT Hz = ----------------------------------------------------------------2 V REF Where: V0 = the RMS differential voltage on Channel 0 V1 = the RMS differential voltage on Channel 1 G = the PGA gain on Channel 0 (current channel) HFC = the frequency constant selected VREF = the voltage reference The constant HFC depends on the FOUT0 and FOUT1 digital settings with the Table 4-3.
MCP3909 5.0 5.1 SERIAL INTERFACE DESCRIPTION DVDD HPF AVDD NC CH0+ CH0CH1CH1+ Dual Functionality Pin And Serial Interface Overview The MCP3909 device contains three serial modes that are accessible by changing the pin functionality of the NEG, F2, F1, and F0 pins to SDO, SCK, SDI and CS, respectively. These modes are entered by giving the MCP3909 device a serial command on these pins during a time window after device reset or POR.
MCP3909 MCLR tWINDOW tWINSET 1 2 3 4 5 6 7 8 F2 / SCK F0 / CS F1 / SDI D7 D6 D5 D4 D3 D2 FIGURE 5-3: 5.2 D1 D0 Dual Functionality Pin Serial Mode Entry Protocol. Serial Mode Entry Codes The MCP3909 devices contains three different serial modes with data presented in 2's complement coding. • Multiplier Output • Dual Channel Output • Filter Input After entering any of these modes the active power calculation block is still functional and presents output pulses on FOUT0, FOUT1, and HFOUT.
MCP3909 5.3 Multiplier Output Mode Multiplier mode allows the user to retrieve the output of the multiplier on the MCP3909 device. Data is presented in a 20 bit (19 bit + sign) protocol, MSB first. A data ready flag (DR) is output for every MCLK/256 clock cycles and a new multiplier output value is ready. If the multiplier value is not clocked out of the device it will be over-written. Data is clocked out on the rising edge of SCK.
MCP3909 5.4 Dual Channel Output Mode This mode allows the user to retrieve the individual channel information from the ADC outputs. The ADC outputs of both channels are synchronized together and their data ready is represented by the data ready pulse on SDO. If the ADC output values are not clocked out of the device, they will be over-written. A 32-bit data word is given, each channel is 16 bits (15 bits + sign), presented in 2's complement coding. Channel 1 comes first then channel 0.
MCP3909 F0 / CS 1 2 X 32 X 16 15 16 X 16 17 18 31 32 F2 / SCK X 16 NEG / SDO Hi-z DR D15 D14 D1 D31 D30 D17 D16 Hi-z Hi-z F1 / SDI 5.6 D0 Channel 0 Channel 1 FIGURE 5-5: X 16 X 32 Dual Channel Output Mode. Filter Input Mode The filter input mode allows the user to feed the MCP3909 device an input to the LPF1. Data is received MSB first.
MCP3909 5.7 Using the MCP3909 with Microcontroller (MCU) SPI Ports With microcontroller SPI ports, it is required to send groups of eight bits. It is also required that the microcontroller SPI port be configured to clock out data on the falling edge of clock and latch data in on the rising edge, or vice versa depending on the mode. 5.7.
MCP3909 F0 / CS MCU latches data from Device on falling edges of SCK F2 / SCK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Data is clocked out on rising edges of SCK F1 / SDI Don’t Care NEG / SDO D19 D18 D17 D16 D15 D14 D13 MCU Transmit Buffer MCU Receive Buffer X X X X X X X D11 D10 D9 D8 D7 D6 D5 D4 D12 X X X X X X X X X D19 D18 D17 D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 Data is stored into the MCU receive register after transmission of the first 8 bits Data i
MCP3909 F0 / CS MCU latches data from Device on falling edges of SCK 1 F2 / SCK 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Data is clocked out on rising edges F1 / SDI Don’t Care CHANNEL 0 NEG / SDO D15 D14 D13 D12 D11 D10 D9 D8 MCU Transmit Buffer X MCU Receive Buffer X X X X X X D6 D5 D4 D3 D2 D1 D0 D7 X X X X X X X X X D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 CH0 Data is stored into the MCU receive register after transmission of the first 8 bits CH0 Da
MCP3909 6.0 APPLICATIONS INFORMATION The following application figures represent meter designs using the MCP3909 device. Some of these applications ideas are available as fully function meter reference designs and demo boards. For complete schematic and for fully function meter designs, visit Microchip’s web page for demo board and reference design availability. 6.
MCP3909 6.2 Achieving Line Cycle Sampling with Zero Blind Cycles A simpler lower cost option would be to choose a frequency that would give an integer number of line cycles for exactly 50 Hz (or 60 Hz). This is possible using a 39.3216 MHz crystal for the PIC18F device. In most energy meter applications, it will be necessary to have 2N samples for each 50 or 60 Hz line cycle, where N is typically 64, 128 or 256.
MCP3909 N L PHA_W:16 ENERGY_W:64 ENERGY_VA_GLSB:16 PHA_I_RMS:16 PHA_V_RMS:16 kW kWhr kVAhr A V CH1+ CH1- MCP3909 AGND,DGND SCK SDI SDO CS Power Supply Circuitry RC3/SCK RC5/SDO RC4/SDI RA0/ANO ... RB7 RC1/CCP2 OSC1 40 MHZ Resistor Divider AVDD,DVDD CLKIN PIC MCU CH0+ CH0- RB0 LCD OSC2 RX/RC6 TX/RC7 GND FIGURE 6-3: 6.3 RS-232 To PC or Calibration Equipment Simplified MCU Based Energy Meter.
MCP3909 7.0 PACKAGING INFORMATION 7.1 Package Marking Information 24-Lead SSOP Examples: XXXXXXXXXXXX XXXXXXXXXXXX YYWWNNN MCP3909 e3 I/SS^^ 1140256 MCP3909 e3 E/SS^^ 1140256 Legend: XX...X Y YY WW NNN e3 * Note: Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free.
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MCP3909 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 2006-2012 Microchip Technology Inc.
MCP3909 NOTES: DS22025C-page 38 2006-2012 Microchip Technology Inc.
MCP3909 APPENDIX A: REVISION HISTORY Revision C (March 2012) The following is the list of modifications: 1. 2. 3. 4. Added the extended temperature option to the features list. Updated Section 2.0 “Typical Performance Curves” with new extended temperature graphs. Added the package markings information for the extended temperature option. Updated the Product Identification System page. Revision B (April 2009) Updated EDS information and Timing Characteristics in Section 1.0 “Electrical Characteristics”.
MCP3909 NOTES: DS22025C-page 40 2006-2012 Microchip Technology Inc.
MCP3909 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. -X /XX Device Temperature Range Package Device: a) MCP3909-I/SS: b) Industrial Temperature, 24LD SSOP. MCP3909T-I/SS: Tape and Reel, Industrial Temperature, 24LD SSOP. c) MCP3909-E/SS: d) Extended Temperature, 24LD SSOP.
MCP3909 NOTES: DS22025C-page 42 2006-2012 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature.
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