Datasheet

MCP3903

7.4 Gain Configuration Register

This register contains the gain register

TABLE 7-6: GAIN REGISTER

Name Bits Address Cof

GAIN 24

0x08

R/W

R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0

PGA2_CH5 PGA1_CH5 PGA0_CH5 BOOST_ CH5 BOOST_ CH4 PGA2_CH4 PGA1_CH4 PGA0_CH4

bit 23 bit 16

R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0

PGA2_CH3 PGA1_CH3 PGA0_CH3 BOOST_ CH3 BOOST_ CH2 PGA2_CH2 PGA1_CH2 PGA0_CH2

bit 15 bit 8

R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0

PGA2_CH1 PGA1_CH1 PGA0_CH1 BOOST_ CH1 BOOST_ CH0 PGA2_CH0 PGA1_CH0 PGA0_CH0

bit 7 bit 0

Legend:

R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’

-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown

bit PGA_CHn: PGA Setting for Channel n

111 = Reserved (Gain = 1)

110 = Reserved (Gain = 1)

101 = Gain is 32

100 = Gain is 16

011 = Gain is 8

010 = Gain is 4

001 = Gain is 2

000 = Gain is 1

bit BOOST_CHn Current Scaling for high speed operation for channel n

1 = Channel has current x 2

0 = Channel has normal current