Datasheet

© 2011 Microchip Technology Inc. DS25048B-page 13
MCP3903
Note: Unless otherwise indicated, AV
DD
= 5.0V, DV
DD
= 3.3 V; T
A
= +25°C, MCLK = 4 MHz; PRESCALE = 1; OSR =
64; GAIN = 1; Dithering OFF; V
IN
= -0.5 dBFS @ 60 Hz.
FIGURE 2-25: Integral Non-Linearity
(Dithering OFF).
FIGURE 2-26: Integral Non-Linearity
(Dithering ON).
FIGURE 2-27: Operating Current vs.
Master Clock (MCLK).
40
50
CH0
20
30
40
50
m
)
CH0
10
0
10
20
30
40
50
L
(ppm)
CH0
CH1
30
-20
-10
0
10
20
30
40
50
INL (ppm)
CH0
CH1
-50
-40
-30
-20
-10
0
10
20
30
40
50
INL (ppm)
CH0
CH1
-50
-40
-30
-20
-10
0
10
20
30
40
50
-0.5 -0.25 0 0.25 0.5
INL (ppm)
Input Voltage (V)
CH0
CH1
-50
-40
-30
-20
-10
0
10
20
30
40
50
-0.5 -0.25 0 0.25 0.5
INL (ppm)
Input Voltage (V)
CH0
CH1
40
50
20
30
40
50
CH0
10
0
10
20
30
40
50
(
ppm)
CH0
CH1
30
-20
-10
0
10
20
30
40
50
INL (ppm)
CH0
CH1
-
50
-40
-30
-20
-10
0
10
20
30
40
50
INL (ppm)
CH0
CH1
-50
-40
-30
-20
-10
0
10
20
30
40
50
-0.5 -0.25 0 0.25 0.5
INL (ppm)
Input Voltage (V)
CH0
CH1
-50
-40
-30
-20
-10
0
10
20
30
40
50
-0.5 -0.25 0 0.25 0.5
INL (ppm)
Input Voltage (V)
CH0
CH1
8
9
6
7
8
9
)
AIDD Boost OFF
4
5
6
7
8
9
D
(mA)
AIDD Boost OFF
2
3
4
5
6
7
8
9
IDD (mA)
AIDD Boost OFF
0
1
2
3
4
5
6
7
8
9
IDD (mA)
AIDD Boost OFF
DIDD
0
1
2
3
4
5
6
7
8
9
1234
IDD (mA)
MCLK Frequency(MHz)
AIDD Boost OFF
DIDD
0
1
2
3
4
5
6
7
8
9
1234
IDD (mA)
MCLK Frequency(MHz)
AIDD Boost OFF
DIDD