Datasheet
© 2011 Microchip Technology Inc. DS22192D-page 15
MCP3901
3.0 PIN DESCRIPTION
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1: PIN FUNCTION TABLE
3.1 RESET
This pin is active low and places the entire chip in a
Reset state when active.
When RESET
= 0, all registers are reset to their default
value, no communication can take place and no clock
is distributed inside the part. This state is equivalent to
a POR state.
Since the default state of the ADCs is on, the analog
power consumption when RESET
= 0 is equivalent to
when RESET
= 1. Only the digital power consumption
is largely reduced because this current consumption is
essentially dynamic and is reduced drastically when
there is no clock running.
All the analog biases are enabled during a Reset so
that the part is fully operational just after a RESET
rising edge.
This input is Schmitt triggered.
3.2 Digital V
DD
(DV
DD
)
DV
DD
is the power supply pin for the digital circuitry
within the MCP3901. This pin requires appropriate
bypass capacitors and should be maintained between
2.7V and 5.5V for specified operation.
3.3 Analog V
DD
(AV
DD
)
AV
DD
is the power supply pin for the analog circuitry
within the MCP3901.
This pin requires appropriate bypass capacitors and
should be maintained to 5V ±10% for specified
operation.
Symbol
Pin No.
Function
SSOP QFN
RESET
1 18 Master Reset Logic Input Pin
DV
DD
2 19 Digital Power Supply Pin
AV
DD
3 20 Analog Power Supply Pin
CH0+ 4 1 Non-Inverting Analog Input Pin for Channel 0
CH0- 5 2 Inverting Analog Input Pin for Channel 0
CH1- 6 3 Inverting Analog Input Pin for Channel 1
CH1+ 7 4 Non-Inverting Analog Input Pin for Channel 1
A
GND
8 5 Analog Ground Pin, Return Path for Internal Analog Circuitry
REFIN+/OUT 9 6 Non-Inverting Voltage Reference Input and Internal Reference Output Pin
REFIN- 10 7 Inverting Voltage Reference Input Pin
D
GND
11 8 Digital Ground Pin, Return Path for Internal Digital Circuitry
MDAT1 12 9 Modulator Data Output Pin for Channel 1
MDAT0 13 10 Modulator Data Output Pin for Channel 0
DR
14 11 Data Ready Signal Output Pin
OSC1/CLKI 15 12 Oscillator Crystal Connection Pin or External Clock Input Pin
OSC2 16 13 Oscillator Crystal Connection Pin
CS
17 14 Serial Interface Chip Select Pin
SCK 18 15 Serial Interface Clock Pin
SDO 19 16 Serial Interface Data Output Pin
SDI 20 17 Serial Interface Data Input Pin
EP
— 21 Exposed Thermal Pad. Must be connected to AGND.