MCP3301 13-Bit Differential Input, Low Power A/D Converter with SPI Serial Interface Features General Description • • • • • • • • • • • The MCP3301 13-bit analog-to-digital (A/D) converter features full differential inputs and low power consumption in a small package that is ideal for battery-powered systems and remote data acquisition applications. Full Differential Inputs ±1 LSB max DNL ±1 LSB max INL (MCP3301-B) ±2 LSB max INL (MCP3301-C) Single supply operation: 4.5V to 5.
MCP3301 1.0 ELECTRICAL CHARACTERISTICS *Notice: Stresses above those listed under “Maximum ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Maximum Ratings* VDD....................................................................
MCP3301 ELECTRICAL CHARACTERISTICS (CONTINUED) Electrical Characteristics: Unless otherwise noted, all parameters apply at VDD = 5V, VSS = 0V, and VREF = 5V. Full differential input configuration (Figure 1-5) with fixed common mode voltage of 2.5V. All parameters apply over temperature with TAMB = -40°C to +85°C (Note 7). Conversion speed (FSAMPLE) is 100 ksps with FCLK = 17*FSAMPLE Parameter Symbol Min Typ Max Units Voltage Range 0.4 — VDD V Current Drain — — 100 0.
MCP3301 ELECTRICAL CHARACTERISTICS (CONTINUED) Electrical Characteristics: Unless otherwise noted, all parameters apply at VDD = 5V, VSS = 0V, and VREF = 5V. Full differential input configuration (Figure 1-5) with fixed common mode voltage of 2.5V. All parameters apply over temperature with TAMB = -40°C to +85°C (Note 7). Conversion speed (FSAMPLE) is 100 ksps with FCLK = 17*FSAMPLE Parameter Symbol Min Typ Max Units Conditions Operating Voltage VDD 4.5 — 5.
MCP3301 1.1 Test Circuits 1 k 1/2 MCP602 MCP3301 1.4V DOUT + 3 k - 20 k Test Point 5VP-P 2.63V 5V ±500 mVp-p To VDD on DUT 1 k 1 k CL = 100 pF FIGURE 1-2: Load Circuit for tR, tF, tDO. FIGURE 1-4: Power Supply Sensitivity Test Circuit (PSRR). Test Point MCP3301 VDD DOUT 3 k VDD/2 100 pF 1 µF tEN Waveform IN(+) IN(-) 5V P-P Voltage Waveforms for tDIS CS VIH DOUT Waveform 1* VREFVDD MCP3301 VSS V CM = 2.
MCP3301 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
MCP3301 Note: Unless otherwise indicated, VDD = VREF = 5V, Full differential input configuration, VSS = 0V, FSAMPLE = 100 ksps, FCLK = 17*FSAMPLE, TA = 25°C. 1 20 0.8 18 0.6 16 Offset Error (LSB) O DNL(LSB) 0.4 14 0.2 12 0 10 -0.2 -0.4 8 6 -0.6 4 -0.8 2 -1 -4096 0 -3072 -2048 -1024 0 1024 2048 3072 4096 0 1 2 Code FIGURE 2-10: FIGURE 2-7: Differential Nonlinearity (DNL) vs. Code (Representative Part). 1.0 5 6 Offset Error vs. VREF. Pos sitive Gain Error (LSB) -0.2 0.
MCP3301 Note: Unless otherwise indicated, VDD = VREF = 5V, Full differential input configuration, VSS = 0V, FSAMPLE = 100 ksps, FCLK = 17*FSAMPLE, TA = 25°C. 80 0 -10 70 -20 60 SINAD (dB) THD (dB) -30 -40 -50 -60 -70 50 40 30 20 -80 10 -90 0 -100 1 10 -40 100 -35 -30 Input Frequency (kHz) -20 -15 -10 -5 0 FIGURE 2-16: Signal to Noise and Distortion (SINAD) vs. Input Signal Level. 3.5 13 3 12 2.5 ENOB (rms) Offset O Error (LSB) FIGURE 2-13: Total Harmonic Distortion (THD) vs.
MCP3301 450 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 400 350 300 IDD (µA) Amplitude (dB) Note: Unless otherwise indicated, VDD = VREF = 5V, Full differential input configuration, VSS = 0V, FSAMPLE = 100 ksps, FCLK = 17*FSAMPLE, TA = 25°C. 250 200 150 100 50 0 0 5000 10000 15000 20000 25000 2 2.5 3 Frequency (Hz) FIGURE 2-19: Frequency Spectrum of 10 kHz Input (Representative Part). 4.5 5 5.5 6 500 450 12.8 400 12.6 350 12.
MCP3301 Note: Unless otherwise indicated, VDD = VREF = 5V, Full differential input configuration, VSS = 0V, FSAMPLE = 100 ksps, FCLK = 17*FSAMPLE, TA = 25°C. 80 120 70 100 60 IDDS (pA) IREF (µA) 80 60 50 40 30 40 20 20 10 0 0 2 2.5 3 FIGURE 2-25: 3.5 4 VDD (V) 4.5 5 5.5 2 6 2.5 3 3.5 FIGURE 2-28: IREF vs. VDD. 4 4.5 5 5.5 6 VDD (V) IDDS vs. VDD. 100 100 90 10 80 60 IDDS (nA) IREF (µA) 70 50 40 1 0.1 30 0.01 20 10 0.
MCP3301 1 80 0.8 79 Common Mode Rejection Ration(dB) Nega ative Gain Error (LSB) Note: Unless otherwise indicated, VDD = VREF = 5V, Full differential input configuration, VSS = 0V, FSAMPLE = 100 ksps, FCLK = 17*FSAMPLE, TA = 25°C. 0.6 0.4 0.2 0 -0.2 -0.4 04 -0.6 -0.8 78 77 76 75 74 73 72 71 70 -1 -50 0 50 100 Temperature (°C) FIGURE 2-31: Temperature. Negative Gain Error vs. 2001-2011 Microchip Technology Inc. 150 1 FIGURE 2-32: vs. Frequency.
MCP3301 3.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 3-1. TABLE 3-1: PIN FUNCTION TABLE MSOP, PDIP, SOIC Name Function 1 VREF Reference Voltage Input 2 IN(+) Positive Analog Input 3 IN(-) Negative Analog Input 4 VSS Ground 5 CS/SHDN 6 DOUT Serial Data Out 7 CLK Serial Clock 8 VDD +4.5V to 5.5V Power Supply 3.
MCP3301 4.0 DEFINITION OF TERMS Bipolar Operation - This applies to either a differential or single-ended input configuration, where both positive and negative codes are output from the A/D converter. Full bipolar range includes all 8192 codes. For bipolar operation on a single-ended input signal, the A/D converter must be configured to operate in pseudo differential mode.
MCP3301 5.0 APPLICATIONS INFORMATION 5.2 5.1 Conversion Description The analog input of the MCP3301 is easily driven either differentially or single ended. Any signal that is common to the two input channels will be rejected by the common mode rejection of the device. During the charging time of the sample capacitor, a small charging current will be required. For low source impedances, this input can be driven directly.
MCP3301 VDD RS VT = 0.6V CHx CPIN 7 pF VA Sampling Switch VT = 0.6V SS RSS = 1 k CSAMPLE = DAC capacitance = 25 pF ILEAKAGE ±1 nA VSS Legend VA RS CHx CPIN VT ILEAKAGE SS RSS CSAMPLE FIGURE 5-3: 5.2.1 = = = = = = = = = signal source source impedance input channel pad input pin capacitance threshold voltage leakage current at the pin due to various junctions sampling switch sampling switch resistor sample/hold capacitance Analog Input Model.
MCP3301 Using an external operational amplifier on the input allows for gain and buffers the input signal from the input to the ADC, allowing for a higher source impedance. This circuit is shown in Figure 5-5. VDD = 5V MCP6022 1 k VIN 0.1 µF + 1 µF IN+ IN- 1 M 1 µF MCP3301 VREF For characterization graphs that show this performance relationship, see Figure 2-2 and Figure 2-6. VDD = 5V VIN VOUT MCP1525 5 0.
MCP3301 5.5 Buffering/Filtering the Analog Inputs Inaccurate conversion results may occur if the signal source for the A/D converter is not a low impedance source. Buffering the input will solve the impedance issue. It is also recommended that an analog filter be used to eliminate any signals that may be aliased back into the conversion results. Using an op amp to drive the analog input of the MCP3301 is illustrated in Figure 5-9.
MCP3301 6.0 SERIAL COMMUNICATIONS 6.1 Output Code Format The output code format is a binary two’s complement scheme with a leading sign bit that indicates the sign of the output. If the IN+ input is higher than the IN- input, the sign bit will be a zero. If the IN- input is higher, the sign bit will be a ‘1’. The diagram shown in Figure 6-1 shows the output code transfer function. In this diagram, the horizontal axis is the analog input voltage and the vertical axis is the output code of the ADC.
MCP3301 Output Code Positive Full Scale Output = VREF -1 LSB 0 + 1111 1111 1111 (+4095) 0 + 1111 1111 1110 (+4094) 0 + 0000 0000 0011 (+3) 0 + 0000 0000 0010 (+2) 0 + 0000 0000 0001 (+1) IN+ > IN- 0 + 0000 0000 0000 (0) IN+ < IN- -VREF 1 + 1111 1111 1111 (-1) 1 + 1111 1111 1110 (-2) Analog Input Voltage IN+ - IN- VREF 1 + 1111 1111 1101 (-3) 1 + 0000 0000 0001 (-4095) Negative Full Scale Output = -VREF FIGURE 6-1: 1 + 0000 0000 0000 (-4096) Output Code Transfer Function.
MCP3301 6.2 Communicating with the MCP3301 12 remaining data bits, as shown in Figure 6-2. Data is always output from the device on the falling edge of the clock. If all 13 data bits have been transmitted and the device continues to receive clocks while the CS is held low, the device will output the conversion result LSB first, as shown in Figure 6-3.
MCP3301 6.3 Using the MCP3301 with Microcontroller (MCU) SPI Ports falling edge of the third clock pulse, followed by the remaining 12 data bits (MSB first). Once the first eight clocks have been sent to the device, the microcontroller’s receive buffer will contain two unknown bits (for the first two clocks, the output is high impedance), followed by the null bit, the sign bit and the highest order four bits of the conversion.
MCP3301 7.0 PACKAGING INFORMATION 7.1 Package Marking Information 8-Lead MSOP (3x3 mm) Example 3301CI 130256 8-Lead PDIP (300 mil) XXXXXXXX XXXXXNNN YYWW 8-Lead SOIC (3.90 mm) Example 3301-BI I/P 3 256 1130 Example 3301-BI SN 3 1130 NNN Legend: XX...
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MCP3301 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS21700E-page 24 2001-2011 Microchip Technology Inc.
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MCP3301 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS21700E-page 26 2001-2011 Microchip Technology Inc.
MCP3301 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 2001-2011 Microchip Technology Inc.
MCP3301 ! &' "()# $ % * 3 & ' !& " & 4 # * !( ! ! & 4 % & & # & && 255*** ' '5 4 DS21700E-page 28 2001-2011 Microchip Technology Inc.
MCP3301 APPENDIX A: REVISION HISTORY Revision E (November 2011) Updated Product Identification System. Corrected MSOP marking drawings. Updated Package Specification Drawings with new additions. Revision D (April 2011) The following is the list of modifications: 1. 2. Updated the content to illustrate that the devices now have tested specifications in the 4.5V to 5.5V supply range. Removed figures 2-4 to 2-6, 2-10 to 2-12, 2-16 and 2-17.
MCP3301 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, contact the local Microchip sales office. PART NO.
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