Datasheet

MCP3201
DS21290F-page 18  1998-2011 Microchip Technology Inc.
FIGURE 4-1: Analog Input Model.
FIGURE 4-2: Maximum Clock Frequency
vs. Input Resistance (R
S
) to maintain less than a
0.1 LSB deviation in INL from nominal
conditions.
C
PIN
VA
R
SS
CHx
7pF
V
T
= 0.6V
V
T
= 0.6V
I
LEAKAGE
Sampling
Switch
SS
R
S
= 1 k
C
SAMPLE
= DAC capacitance
V
SS
V
DD
= 20 pF
±1 nA
Legend:
VA = Signal Source
R
SS
= Source Impedance
CHx = Input Channel Pad
C
PIN
= Input Pin Capacitance
V
T
= Threshold Voltage
I
LEAKAGE
= Leakage Current At The Pin
Due To Various Junctions
SS = Sampling Switch
R
S
= Sampling Switch Resistor
C
SAMPLE
= Sample/hold Capacitance
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
100 1000 10000
Input Resistance (Ohms)
Clock Frequency (MHz)
V
DD
= V
REF
= 5V
V
DD
= V
REF
= 2.7V