Datasheet
MCP3004/3008
DS21295D-page 4 © 2008 Microchip Technology Inc.
Leakage Current — 0.001 ±1 µA
Switch Resistance — 1000 — Ω See Figure 4-1
Sample Capacitor — 20 — pF See Figure 4-1
Digital Input/Output
Data Coding Format Straight Binary
High Level Input Voltage V
IH
0.7 V
DD
——V
Low Level Input Voltage V
IL
— 0.3 V
DD
V
High Level Output Voltage V
OH
4.1 — — V I
OH
= -1 mA, V
DD
= 4.5V
Low Level Output Voltage V
OL
——0.4VI
OL
= 1 mA, V
DD
= 4.5V
Input Leakage Current I
LI
-10 — 10 µA V
IN
= V
SS
or V
DD
Output Leakage Current I
LO
-10 — 10 µA V
OUT
= V
SS
or V
DD
Pin Capacitance
(All Inputs/Outputs)
C
IN
,
C
OUT
—— 10pFV
DD
= 5.0V (Note 1)
T
A
= 25°C, f = 1 MHz
Timing Parameters
Clock Frequency f
CLK
——3.6
1.35
MHz
MHz
V
DD
= 5V (Note 3)
V
DD
= 2.7V (Note 3)
Clock High Time t
HI
125 — — ns
Clock Low Time t
LO
125 — — ns
CS
Fall To First Rising CLK Edge t
SUCS
100 — — ns
CS Fall To Falling CLK Edge t
CSD
—— 0 ns
Data Input Setup Time t
SU
50 — — ns
Data Input Hold Time t
HD
50 — — ns
CLK Fall To Output Data Valid t
DO
——125
200
ns
ns
V
DD
= 5V, See Figure 1-2
V
DD
= 2.7V, See Figure 1-2
CLK Fall To Output Enable t
EN
——125
200
ns
ns
V
DD
= 5V, See Figure 1-2
V
DD
= 2.7V, See Figure 1-2
CS
Rise To Output Disable t
DIS
— — 100 ns See Test Circuits, Figure 1-2
CS
Disable Time t
CSH
270 — — ns
D
OUT
Rise Time t
R
— — 100 ns See Test Circuits, Figure 1-2
(Note 1)
D
OUT
Fall Time t
F
— — 100 ns See Test Circuits, Figure 1-2
(Note 1)
ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: Unless otherwise noted, all parameters apply at V
DD
= 5V, V
REF
= 5V,
T
A
= -40°C to +85°C, f
SAMPLE
= 200 ksps and f
CLK
= 18*f
SAMPLE
. Unless otherwise noted, typical values apply for
V
DD
= 5V, T
A
= +25°C.
Parameter Sym Min Typ Max Units Conditions
Note 1: This parameter is established by characterization and not 100% tested.
2: See graphs that relate linearity performance to V
REF
levels.
3: Because the sample cap will eventually lose charge, effective clock rates below 10 kHz can affect linearity
performance, especially at elevated temperatures. See Section 6.2 “Maintaining Minimum Clock
Speed”, “Maintaining Minimum Clock Speed”, for more information.