MCP3002 2.7V Dual Channel 10-Bit A/D Converter with SPI Serial Interface Features Description • • • • The MCP3002 is a successive approximation 10-bit analog-to-digital (A/D) converter with on-board sample and hold circuitry. • • • • • • • • 10-bit resolution ±1 LSB maximum DNL ±1 LSB maximum INL Analog inputs programmable as single-ended or pseudo-differential pairs On-chip sample and hold SPI serial interface (modes 0,0 and 1,1) Single supply operation: 2.7V - 5.
MCP3002 1.0 ELECTRICAL CHARACTERISTICS † Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Absolute Maximum Ratings † VDD ...............................................
MCP3002 ELECTRICAL CHARACTERISTICS (CONTINUED) All parameters apply at VDD = 5V, TA = -40°C to +85°C, fSAMPLE = 200 ksps and fCLK = 16*fSAMPLE, unless otherwise noted. Typical values apply for VDD = 5V, TA = +25°C, unless otherwise noted. PARAMETER SYM MIN TYP MAX UNITS CONDITIONS High Level Input Voltage VIH 0.7 VDD — — V Low Level Input Voltage VIL — — 0.3 VDD V High Level Output Voltage VOH 4.1 — — V IOH = -1 mA, VDD = 4.5V Low Level Output Voltage VOL — — 0.
MCP3002 TEMPERATURE CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, VDD = +2.7V to +5.5V, VSS = GND. Parameters Sym Min Typ Max Units Specified Temperature Range TA -40 — +85 °C Operating Temperature Range TA -40 — +85 °C Storage Temperature Range TA -65 — +150 °C Thermal Resistance, 8L-MSOP JA — 211 — °C/W Thermal Resistance, 8L-PDIP JA — 89.5 — °C/W Thermal Resistance, 8L-SOIC JA — 149.
MCP3002 Load Circuit for tDIS and tEN Load Circuit for tR, tF, tDO Test Point 1.
MCP3002 2.0 TYPICAL PERFORMANCE CHARACTERISTICS Note: The graphs provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
MCP3002 Note: Unless otherwise indicated, VDD = 5V, fSAMPLE = 200 ksps, fCLK = 16* fSAMPLE, TA = +25°C. 0.8 0.6 Positive INL 0.4 DNL (LSB) INL(LSB) 1.0 0.8 0.6 0.4 0.2 0.0 -0.2 -0.4 -0.6 -0.8 -1.0 Negative INL 3.0 3.5 FIGURE 2-7: vs. VDD. 0.0 -0.2 4.0 VDD (V) 4.5 All points taken at fSAMPLE = 200 ksps except VDD = 2.7V, fSAMPLE = 75 ksps -0.6 -0.8 5.0 2.5 5.5 Integral Nonlinearity (INL) 3.0 4.0 VDD (V) 4.5 5.0 5.5 Differential Nonlinearity 0.6 0.4 VDD = 2.7V 0.
MCP3002 Note: Unless otherwise indicated, VDD = 5V, fSAMPLE = 200 ksps, fCLK = 16* fSAMPLE, TA = +25°C. 0.4 0.4 0.3 0.3 0.2 Positive DNL DNL (LSB) DNL (LSB) 0.2 0.1 0.0 -0.1 Negative DNL -0.2 0.0 -0.1 Negative DNL -0.3 -0.4 -0.4 -50 -25 0 25 50 Temperature (°C) 75 100 FIGURE 2-13: Differential Nonlinearity (DNL) vs. Temperature. -50 1.0 1.0 0.8 0.6 0.4 0.2 0.0 -0.2 -0.4 -0.6 -0.8 -1.0 -25 0 25 50 Temperature (°C) 75 100 FIGURE 2-16: Differential Nonlinearity (DNL) vs.
MCP3002 80 80 70 70 60 60 SINAD (dB) SNR (dB) Note: Unless otherwise indicated, VDD = 5V, fSAMPLE = 200 ksps, fCLK = 16* fSAMPLE, TA = +25°C. 50 VDD = 2.7V fSAMPLE = 75 ksps 40 30 VDD = 5V fSAMPLE = 200 ksps 10 0 10 Input Frequency (kHz) 100 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 1 10 Input Frequency (kHz) 100 FIGURE 2-22: Signal-to-Noise and Distortion (SINAD) vs. Input Frequency. FIGURE 2-19: Signal-to-Noise Ratio (SNR) vs. Input Frequency. 80 70 VDD = 2.
MCP3002 Note: Unless otherwise indicated, VDD = 5V, fSAMPLE = 200 ksps, fCLK = 16* fSAMPLE, TA = +25°C. 100 600 90 VDD = 5V 80 fSAMPLE = 200 ksps 500 60 50 VDD = 2.7V 40 fSAMPLE = 75 ksps IDD (µA) SFDR (dB) 70 30 20 400 300 200 100 10 0 1 10 All points at fCLK = 3.2 MHz except at VDD = 2.5V, fCLK = 1.2 MHz 0 100 2.0 2.5 3.0 Input Frequency (kHz) FIGURE 2-25: Spurious Free Dynamic Range (SFDR) vs. Input Frequency.
MCP3002 70 Analog Input Leakage (nA) Note: Unless otherwise indicated, VDD = 5V, fSAMPLE = 200 ksps, fCLK = 16* fSAMPLE, TA = +25°C. CS = VDD 60 IDDS (pA) 50 40 30 20 10 0 2.5 3.0 3.5 FIGURE 2-31: 100.00 4.0 4.5 VDD (V) 5.0 5.5 6.0 IDDS vs. VDD. 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 VDD = 5V -50 -25 0 25 50 Temperature (°C) 75 100 FIGURE 2-33: Analog Input leakage current vs. Temperature. VDD = CS = 5V IDDS (nA) 10.00 1.00 0.10 0.
MCP3002 3.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 3-1. Additional descriptions of the device pins follows. TABLE 3-1: PIN FUNCTION TABLE MSOP, PDIP, SOIC, TSSOP Name 1 CS/SHDN 2 CH0 Channel 0 Analog Input 3 CH1 Channel 1 Analog Input 4 VSS Ground 5 DIN Serial Data In 6 DOUT Serial Data Out 7 CLK Serial Clock 8 VDD/VREF 3.1 Function Chip Select/Shutdown Input +2.7V to 5.
MCP3002 4.0 DEVICE OPERATION The MCP3002 A/D converter employs a conventional SAR architecture. With this architecture, a sample is acquired on an internal sample/hold capacitor for 1.5 clock cycles starting on the second rising edge of the serial clock after the start bit has been received. Following this sample time, the input switch of the converter opens and the device uses the collected charge on the internal sample and hold capacitor to produce a serial 10-bit digital output code.
MCP3002 VDD VT = 0.6V CHx RSS Sampling Switch CPIN 7 pF VA VT = 0.6V SS ILEAKAGE ±1 nA RS = 1 kW CSAMPLE = DAC capacitance = 20 pF VSS Legend VA RSS CHx CPIN VT = = = = = = = = = ILEAKAGE SS RS CSAMPLE FIGURE 4-1: signal source source impedance input channel pad input pin capacitance threshold voltage leakage current at the pin due to various junctions sampling switch sampling switch resistor sample/hold capacitance Analog Input Model. Clock Frequency (MHz) 4.0 V DD = 5V 3.
MCP3002 5.0 SERIAL COMMUNICATIONS 5.1 Overview Communication with the MCP3002 is done using a standard SPI-compatible serial interface. Initiating communication with the device is done by bringing the CS line low. See Figure 5-1. If the device was powered up with the CS pin low, it must be brought high and back low to initiate communication. The first clock received with CS low and DIN high will constitute a start bit.
MCP3002 tCYC tCYC tCSH CS tSUCS HI-Z DOUT MSBF ODD/ SIGN DIN SGL/ DIFF Start CLK ODD/ SIGN Don’t Care Null B9 B8 B7 Bit tSAMPLE B6 B5 B4 B3 B2 B1 B0* tCONV HI-Z tDATA** * After completing the data transfer, if further clocks are applied with CS low, the A/D Converter will output zeros indefinitely. See Figure 5-2 for details on obtaining LSB first data. ** tDATA: during this time, the bias current and the comparator powers down while the reference input becomes a high-impedance node.
MCP3002 6.0 APPLICATIONS INFORMATION 6.1 Using the MCP3002 with Microcontroller (MCU) SPI Ports As an example, Figure 6-1 and Figure 6-2 show how the MCP3002 can be interfaced to a MCU with a hardware SPI port. Figure 6-1 depicts the operation shown in SPI Mode 0,0, which requires that the SCLK from the MCU idles in the ‘low’ state, while Figure 6-2 shows the similar case of SPI Mode 1,1 where the clock idles in the ‘high’ state.
MCP3002 CS MCU latches data from A/D Converter on rising edges of SCLK SCLK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 X = Don’t Care Bits FIGURE 6-2: high). 6.
MCP3002 6.4 Layout Considerations When laying out a printed circuit board for use with analog components, care should be taken to reduce noise wherever possible. A bypass capacitor should always be used with this device and should be placed as close as possible to the device pin. A bypass capacitor value of 1 µF is recommended. Digital and analog traces should be separated as much as possible on the board and no traces should run underneath the device or the bypass capacitor.
MCP3002 7.0 PACKAGING INFORMATION 7.1 Package Marking Information 8-Lead MSOP (3x3 mm) Example 3002I 130256 8-Lead PDIP (300 mil) XXXXXXXX XXXXXNNN YYWW 8-Lead SOIC (3.90 mm) Example 3002 I/P 3 256 1130 Example 3002I SN 3 1130 NNN Legend: XX...
MCP3002 Package Marking Information (Continued) 8-Lead TSSOP (4.4 mm) Example 3002 l130 256 Legend: XX...X Y YY WW NNN e3 * Note: Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package.
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MCP3002 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 2000-2011 Microchip Technology Inc.
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MCP3002 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 2000-2011 Microchip Technology Inc.
MCP3002 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS21294E-page 26 2000-2011 Microchip Technology Inc.
MCP3002 ! &' "()# $ % * 3 & ' !& " & 4 # * !( ! ! & 4 % & & # & && 255*** ' '5 4 2000-2011 Microchip Technology Inc.
MCP3002 +, , + ! -(- $ % + 3 & ' !& " & 4 # * !( ! ! & 4 % & & # & && 255*** ' '5 4 D N E E1 NOTE 1 1 2 b e c A φ A2 A1 L L1 6 &! ' ! 7 ' &! 8"') % ! 77 + + 8 8 89 : ; & 9 ? & @ @ ; , , @ , # # 4 4 !! & # %% =, 0 1 9 B #& + # # 4 B #& + -
MCP3002 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 2000-2011 Microchip Technology Inc.
MCP3002 APPENDIX A: REVISION HISTORY Revision E (November 2011) Updated Product Identification System Corrected MSOP marking drawings. Updated Package Specification Drawings with new additions. Revision D (October 2008) Updates to packaging outline drawings. Revision C (January 2007) Updates to packaging outline drawings. Revision B (August 2001) Undocumented changes. Revision A (February 2000) Initial release of this document. DS21294E-page 30 2000-2011 Microchip Technology Inc.
MCP3002 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO.
MCP3002 NOTES: DS21294E-page 32 2000-2011 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature.
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