Datasheet

© 2007 Microchip Technology Inc. DS21293C-page 3
MCP3001
Temperature Ranges:
Specified Temperature Range T
A
-40 — +85 °C
Operating Temperature Range T
A
-40 — +85 °C
Storage Temperature Range T
A
-65 — +150 °C
Thermal Package Resistance:
Thermal Resistance, 8L-PDIP
θ
JA
—85—°C/W
Thermal Resistance, 8L-SOIC θ
JA
—163—°C/W
Thermal Resistance, 8L-MSOP
θ
JA
—206—°C/W
Thermal Resistance, 8L-TSSOP θ
JA
——°C/W
Analog Inputs:
Input Voltage Range (IN+) IN+ IN- — V
REF
+IN- V
Input Voltage Range (IN-) IN- V
SS
-100 — V
SS
+100 mV
Leakage Current — 0.001 ±1 µA
Switch Resistance R
SS
—1K— Ω See Figure 4-1
Sample Capacitor C
SAMPLE
— 20 — pF See Figure 4-1
Digital Input/Output:
Data Coding Format Straight Binary
High Level Input Voltage V
IH
0.7 V
DD
—— V
Low Level Input Voltage V
IL
——0.3 V
DD
V
High Level Output Voltage V
OH
4.1 — — V I
OH
= -1 mA, V
DD
= 4.5V
Low Level Output Voltage V
OL
——0.4VI
OL
= 1 mA, V
DD
= 4.5V
Input Leakage Current I
LI
-10 — 10 µA V
IN
= V
SS
or V
DD
Output Leakage Current I
LO
-10 — 10 µA V
OUT
= V
SS
or V
DD
Pin Capacitance
(all inputs/outputs)
C
IN
, C
OUT
— — 10 pF V
DD
= 5.0V (Note 1)
T
AMB
= 25°C, f = 1 MHz
Timing Parameters:
Clock Frequency f
CLK
——2.8
1.05
MHz
MHz
V
DD
= 5V (Note 3)
V
DD
= 2.7V (Note 3)
Clock High Time t
HI
160 — — ns
Clock Low Time t
LO
160 — — ns
CS
Fall To First Rising CLK Edge t
SUCS
100 — — ns
CLK Fall To Output Data Valid t
DO
— — 125
200
ns
ns
V
DD
= 5V, See Figure 1-2
V
DD
= 2.7, See Figure 1-2
CLK Fall To Output Enable t
EN
— — 125
200
ns
ns
V
DD
= 5V, See Figure 1-2
V
DD
= 2.7, See Figure 1-2
CS Rise To Output Disable t
DIS
— — 100 ns See test circuits, Figure 1-2
(Note 1)
CS
Disable Time t
CSH
350 — — ns
D
OUT
Rise Time t
R
— — 100 ns See test circuits, Figure 1-2
(Note 1)
D
OUT
Fall Time t
F
— — 100 ns See test circuits, Figure 1-2
(Note 1)
All parameters apply at V
DD
= 5V, V
SS
= 0V, V
REF
= 5V, T
AMB
= -40°C to +85°C, f
SAMPLE
= 200 ksps and f
CLK
= 14*f
SAMPLE
,
unless otherwise noted. Typical values apply for V
DD
= 5V, T
AMB
=25°C, unless otherwise noted.
Parameter Sym Min Typ Max Units Conditions
Note 1: This parameter is guaranteed by characterization and not 100% tested.
2: See graph that relates linearity performance to V
REF
level.
3: Because the sample cap will eventually lose charge, clock rates below 10 kHz can affect linearity perfor-
mance, especially at elevated temperatures.