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MCP2515

The MCP2515 parts you have received conform

functionally to the Device Data Sheet (DS21801D),

except for the anomalies described below.

1. Module: Oscillator Module

In silicon revisions prior to revision B2: The

oscillator module may continue to operate when

the device is placed in Sleep mode if the DC

voltage on the OSC1 pin is too low. The rest of the

device enters Sleep mode normally. This scenario

results in higher-than-specified standby current

DDS).

Work around

This issue was addressed and no longer occurs in

silicon revision B2. See Appendix B “Silicon

Revision History” to determine how to identify

silicon revision(s) prior to revision B2.

Revision B0 and earlier:

Configure the crystal

circuit such that the maximum input signal is

achieved on the OSC1 pin without overdriving the

crystal. This can be accomplished by using crystals

that require minimal or no series resistance (R

S),

as shown in the crystal circuit diagram of the

Device Data Sheet. In addition, matching the

capacitors (C1 and C2) may help.

2. Module: RAM Module

In silicon revisions prior to revision B2: Trans-

mit buffer 1 and/or 2 could become corrupted if,

while receiving a CAN message, a Request-To-

Send (RTS) occurs during the first oscillator cycle

of TQ0 of selected bits in the CAN message. This

corresponds to the MCP2515’s internal CAN clock

high time, which is 1 TOSC wide.

Work around

This issue was addressed and no longer occurs in

silicon revision B2. See Appendix B to determine

how to identify silicon revision(s) prior to revision

B2.

Revision B0 and earlier:

If using only one transmit

buffer, use buffer 0. Otherwise, to ensure the

correct message is transmitted 100% of the time,

read the transmit buffer after successful

transmission to verify the contents.

3. Module: CAN Module

In silicon revisions prior to revision B4: Under

one condition, the device will make the first five

identifier bits all dominant (logic 0) regardless of

the value in the transmit buffer ID register.

If the MCP2515 detects a Start-of-Frame (SOF) in

the third bit of interframe space and

if the

MCP2515 is pending transmission of a message,

the first five bits of the identifier will become

dominant.

Work around

Revision B4 and later: This issue was addressed

and no longer occurs in silicon revisions B4 and

later. See Appendix B to determine how to identify

silicon revisions prior to revision B4.

Revision B2 and earlier:

If possible, have the

other nodes in the system filter out messages

where the first five bits are dominant.

4. Module: CAN Module

Under one specific condition, a transmit buffer can

become corrupted.

1. A lower priority buffer (as configured via TXBnC-

TRL.TXP<1:0>) is "pending" transmission (not

actually transmitting).

2. A higher priority buffer becomes "pending" dur-

ing the trigger pulse (1t

OSC

wide) which starts

the transmission of the lower priority buffer.

3. The buffers attempt to reprioritize because the

message has not actually started transmission.

There is a small window (1t

OSC

wide) where the

buffer has been committed to transmit, but is still

viewed as "pending" by the logic. If the higher

priority buffer becomes “pending” during this

window, the buffers will not reprioritize success-

fully and corruption will occur.

Work around

There are a few possible work arounds:

• Request transmission (RTS) of all full buffers at

the same time. The internal buffer priority will

determine the transmission sequence.

• RTS the higher priority buffer first to avoid the

possibility of reprioritzation errors.

• Send messages one-at-a-time (i.e., check

TXnIF before send the next message).

MCP2515 Rev. B Silicon Errata

Summary of content (6 pages)

PAGE 1
MCP2515 MCP2515 Rev. B Silicon Errata The MCP2515 parts you have received conform functionally to the Device Data Sheet (DS21801D), except for the anomalies described below. 3. Module: CAN Module In silicon revisions prior to revision B4: Under one condition, the device will make the first five identifier bits all dominant (logic 0) regardless of the value in the transmit buffer ID register. 1.
PAGE 2
MCP2515 5. Module: SPI Module Holding CS low for a long time after an SPI command which initiates a CAN message may keep the CAN transmit request “pending”, causing the CAN message to be repeated. Two Scenarios: 1. 2. Generating an “SPI RTS” command while in SPI Mode 11 (Mode 00 is not affected): If an “SPI RTS” command is generated, and CS is held low for longer than it takes for the CAN message to transmit, the message will be transmitted again.
PAGE 3
MCP2515 APPENDIX B: SILICON REVISION HISTORY The following table and package marking information indicates how to determine the revision of the MCP2515 device. The revision information can be determined by the Year and Week Code of the manufacturer printed on the device. TABLE B-1: SILICON REVISION/DEVICE MARKING YYWWNNN Silicon Revision Start Date End Date Rev B4 0538NNN — Rev B2 0450NNN 0537NNN Rev B0 — 0449NNN Comments In Production Legend: “N” is any alphanumeric character.
PAGE 5
Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature.
PAGE 6
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