Datasheet

MCP2510
DS21291F-page 42 © 2007 Microchip Technology Inc.
FIGURE 6-1: ERROR MODES STATE DIAGRAM
REGISTER 6-1: TEC - TRANSMITTER ERROR COUNTER (ADDRESS: 1Ch)
REGISTER 6-2: REC - RECEIVER ERROR COUNTER (ADDRESS: 1Dh)
R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0
TEC7 TEC6 TEC5 TEC4 TEC3 TEC2 TEC1 TEC0
bit 7 bit 0
bit 7-0 TEC<7:0>: Transmit Error Count
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ’1’ = Bit is set ’0’ = Bit is cleared x = Bit is unknown
R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0
REC7 REC6 REC5 REC4 REC3 REC2 REC1 REC0
bit 7 bit 0
bit 7-0 REC<7:0>: Receive Error Count
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ’1’ = Bit is set ’0’ = Bit is cleared x = Bit is unknown
Bus-Off
Error-Active
Error-Passive
REC > 127 or
TEC > 127
REC < 127 or
TEC < 127
TEC > 255
RESET
128 occurrences of
11 consecutive
“recessive” bits