Datasheet

MCP2510
DS21291F-page 40 © 2007 Microchip Technology Inc.
REGISTER 5-2: CNF2 - CONFIGURATION REGISTER2 (ADDRESS: 29h)
REGISTER 5-3: CNF3 - CONFIGURATION REGISTER 3 (ADDRESS: 28h)
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
BTLMODE SAM PHSEG12 PHSEG11 PHSEG10 PRSEG2 PRSEG1 PRSEG0
bit 7 bit 0
bit 7 BTLMODE: Phase Segment 2 Bit Time Length
1 = Length of Phase Seg 2 determined by PHSEG22:PHSEG20 bits of CNF3
0 = Length of Phase Seg 2 is the greater of Phase Seg 1 and IPT (2TQ)
bit 6 SAM: Sample Point Configuration
1 = Bus line is sampled three times at the sample point
0 = Bus line is sampled once at the sample point
bit 5-3 PHSEG1<2:0>: Phase Segment 1 Length
(PHSEG1 + 1) x T
Q
bit 2-0 PRSEG<2:0>: Propagation Segment Length
(PRSEG + 1) x TQ
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ’1’ = Bit is set ’0’ = Bit is cleared x = Bit is unknown
U-0 R/W-0 U-0 U-0 U-0 R/W-0 R/W-0 R/W-0
— WAKFIL — — — PHSEG22 PHSEG21 PHSEG20
bit 7 bit 0
bit 7 Unimplemented: Reads as '0'
bit 6 WAKFIL: Wake-up Filter
1 = Wake-up filter enabled
0 = Wake-up filter disabled
bit 5-3 Unimplemented: Reads as '0'
bit 2-0 PHSEG2<2:0>: Phase Segment 2 Length
(PHSEG2 + 1) x T
Q
Note: Minimum valid setting for Phase Segment 2 is 2TQ
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ’1’ = Bit is set ’0’ = Bit is cleared x = Bit is unknown