Datasheet

MCP2502X/5X
DS21664D-page 42 © 2007 Microchip Technology Inc.
7.3.2 CONVERSION-ON-REQUEST
MODE
If the Conversion-on-request mode is selected, the
device performs an A/D conversion only after receiving
a Read A/D Registers or Read Register Receive
message (IRM). In the case of the Read A/D Registers
command, all of the GPIO pins that have been
configured as analog input channels will have an A/D
conversion done before the data frame is sent. When a
Read Register Receive message is initiated (extended
message format only), the A/D conversion is performed
when the MSB of the analog channel is requested, with
the MSB result being transferred. A subsequent read of
the LSB will transmit the value latched when the MSB
was requested (it is recommended that the Read A/D
Registers receive message is used to obtain complete
analog channel values in one message).
7.4 A/D Threshold Detection
Once an A/D auto-conversion has been completed, the
A/D channel result(s) can be compared to a value
stored in the associated A/D channel comparator
registers.
If the value in the analog channel result registers (i.e.,
AN0L and AN10H registers for analog channel 0) is
lower or higher than the value in the A/D comparator
registers (as specified by a corresponding polarity bit),
a transmit-on-change message will be sent (TXID2).
The threshold-detection function for all analog
channels is bit-selectable.
If the A/D channel has been configured for transmit-on-
change mode, the MCP2505 will send a transmit
message with the appropriate data. It is possible that
more than one A/D channel has a change-of-state
condition. This does not pose a problem since all
analog channel data is provided in the transmit
message.
REGISTER 7-1: A/D MODULE RESULT REGISTER MSB (ADRESNH)
REGISTER 7-2: A/D MODULE RESULT REGISTER LSB (ADRES
NL)
R-x R-x R-x R-x R-x R-x R-x R-x
AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2
bit 7 bit 0
bit 7-0 AD9:AD2: Most Significant A/D Result bits
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
- n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
R-x R-x U-0 U-0 U-0 U-0 U-0 U-0
AD1 AD0
— — — — — —
bit 7 bit 0
bit 7-6 AD1:AD0: Least significant A/D Result bits
bit 5-0 Unimplemented: Reads as ‘0’
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
- n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown