Datasheet

MCP2502X/5X
DS21664D-page 34 © 2007 Microchip Technology Inc.
REGISTER 5-6: OPTREG1 REGISTER
R/W-1 R/W-1 R/W-1 R/W-1 U-0 R/W-0 R/W-0 R/W-0
GPPU CLKEN CLKPS1 CLKPS0 CMREQ AQT1 AQT0
bit 7 bit 0
bit 7 GPPU
: Weak pull-up enabled
1 = Weak pull-ups disabled
0 = Weak pull-ups enabled (GP7:GP0)
bit 6 CLKEN
:
1 = Clock Out Function disabled
0 = Clock Out Function enabled
bit 5-4 CLKPS1:CLKPS0: CLKOUT Prescaler bits
00 = F
OSC/1
01 = F
OSC/2
10 = F
OSC/4
11 = F
OSC/8
bit 3 Reserved:
bit 2 CMREQ: Requests mode of operation (allows mode changes via the CAN bus)
1 = Requests Listen-only mode
0 = Requests Normal mode *
* CMREQ must be cleared as default to avoid device entering Listen-only mode on first “Input”
message.
bit 1-0 AQT1:AQT0: Analog Acquisition Time bits
00 = 64T
OSC
01 = 2(64TOSC)
10 = 4
(64TOSC)
11 = 8
(64TOSC)
(e.g., AQT1:AQT0 => 00 => 2.56 µs for a 25 MHz F
OSC)
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
- n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown