Datasheet
Table Of Contents
- Features
- CMOS Technology
- Packages
- Package Types
- Block Diagram
- 1.0 Device OvervieW
- 1.1 Pin Descriptions
- 1.2 Power-on Reset (POR)
- 1.3 Power-up Timer (PWRT)
- 1.4 Clock Generator
- 1.5 I2C Bus Interface/ Protocol Handler
- 1.6 Address Decoder
- 1.7 Register Block
- 1.8 Serializer/Deserializer
- 1.9 Interrupt Logic
- 2.0 Electrical Characteristics
- 2.1 DC Characteristics
- TABLE 2-1: DC Characteristics
- FIGURE 2-1: respOnse time
- TABLE 2-2: response time
- FIGURE 2-2: TEST POINT Clock Timing
- TABLE 2-3: TEST POINT Clock Timing
- TABLE 2-4: Power-up Timer Requirements
- FIGURE 2-3: I2C Bus Start/Stop Bits Timing
- FIGURE 2-4: I2C Bus Data Timing
- TABLE 2-5: I2C Bus Data Requirements
- FIGURE 2-5: GP0 and GP1 POrt Timings
- 2.1 DC Characteristics
- 3.0 Package InFormation
- Appendix A: Revision History
- Product Identification System
- Worldwide Sales and Service
© 2007 Microchip Technology Inc. DS20090C-page 5
MCP23016
1.7 Register Block
The register block contains the Configuration and Port registers, as shown in Table 1-5.
TABLE 1-5: REGISTER SUMMARY
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR
Port Registers
GP0 GP0.7 GP0.6 GP0.5 GP0.4 GP0.3 GP0.2 GP0.1 GP0.0 0000 0000
GP1 GP1.7 GP1.6 GP1.5 GP1.4 GP1.3 GP1.2 GP1.1 GP0.0 0000 0000
OLAT0 OL0.7 OL0.6 OL0.5 OL0.4 OL0.3 OL0.2 OL0.1 OL0.0 0000 0000
OLAT1 OL1.7 OL1.6 OL1.5 OL1.4 OL1.3 OL1.2 OL1.1 OL1.0 0000 0000
Configuration Registers
IPOL0 IGP0.7 IGP0.6 IGP0.5 IGP0.4 IGP0.3 IGP0.2 IGP0.1 IGP0.0 0000 0000
IPOL1 IGP1.7 IGP1.6 IGP1.5 IGP1.4 IGP1.3 IGP1.2 IGP1.1 IGP1.0 0000 0000
IODIR0 IOD0.7 IOD0.6 IOD0.5 IOD0.4 IOD0.3 IOD0.2 IOD0.1 IOD0.0 1111 1111
IODIR1 IOD1.7 IOD1.6 IOD1.5 IOD1.4 IOD1.3 IOD1.2 IOD1.1 IOD1.0 1111 1111
INTCAP0 ICP0.7 ICP0.6 ICP0.5 ICP0.4 ICP0.3 ICP0.2 ICP0.1 ICP0.0 xxxx xxxx
INTCAP1 ICP1.7 ICP1.6 ICP1.5 ICP1.4 ICP1.3 ICP1.2 ICP1.1 ICP1.0 xxxx xxxx
IOCON0
— — — — — — — IARES ---- ---0
IOCON1 — — — — — — — IARES ---- ---0
Legend:
‘1’ bit is set, ‘0’ bit is cleared, x = unknown, — = unimplemented.