Information

MCP2120/22 DEVELOPER’S BOARD

USER’S GUIDE

Appendix C. Board Testing

C.1 WHAT IS TESTED

The MCP2120/22 Developer’s Board can be used in multiple configurations. Only a

subset of these configurations will be tested. The following portions of the board are

tested:

• MCP2122

• TFDU-4300 (U5) and circuitry (JP1C1, JP2C1)

• USB Power circuitry

• DB-9 Interface and circuitry

• ICSP Header (J2)

• Y1 circuitry (14.7456MHz)

• JP1 and JP2 shorted

• JMP1 (P1 – P2, P2 – P3)

• JMP2 (P1 – P2, P2 – P3)

• JMP3 (P1 – P2, P2 – P3)

• JMP4 (P1 – P2, P2 – P3)

• JMP5 (P1 – P2)

• JMP7 (P2 – P3)

• JMP6 (RD4, RD5, RD6)

C.2 WHAT IS NOT TESTED

The following portions, but not limited to, of the board are NOT tested:

• MCP2120 and associated crystal circuitry (7.3728 MHz)

• TFDU-4101 (U3) and circuitry

• HSDL-3000 (U1) and circuitry

• Header HD1

• JP1 and JP2 open

• JMP6 (RD0, RD0, RD2, RD3, RD7)

• JMP5 (P2 – P3)

• JMP7 (P1 – P2)

• JP1A1, JP2A1, JP1B1, JP2B1

• USB Data Lines

• Switch S1