MCP2122 Infrared Encoder/Decoder Features Package Types • Pinout compatible with HSDL-7000 • Compliant with IrDA® Standard Physical Layer Specification (version 1.3) • UART to IrDA Standard Encoder/Decoder - Interfaces with IrDA Standard Compliant Transceiver • Baud Rates: - Up to IrDA Standard 115.2 Kbaud Operation • Transmit/Receive Formats (Bit Width) Supported: - 1.63 µs • Low-power Mode (2 µA at 1.
MCP2122 NOTES: DS21894C-page 2 Preliminary © 2007 Microchip Technology Inc.
MCP2122 1.0 DEVICE OVERVIEW TABLE 1-1: The MCP2122 is a stand-alone IrDA standard encoder/ decoder device that is pinout-compatible with the Agilent® HSDL-7000 encoder/decoder. Features The MCP2122 has two interfaces: the host UART interface and the IR interface (see Figure 1-1). The host UART interfaces to the UART of the Host Controller. The Host Controller is the device in the embedded system that transmits and receives the data.
MCP2122 TABLE 1-2: Pin Name PIN DESCRIPTION Pin Number PDIP SOIC Pin Type Buffer Type Description 16XCLK 1 1 I ST 16x external clock source input TX 2 2 I ST Asynchronous receive from Host Controller UART RX 3 3 O — Asynchronous transmit to Host Controller UART VSS 4 4 — P Ground reference for logic and I/O pins RESET 5 5 I ST Resets the Device H = Normal Operation L = Device in Reset RXIR 6 6 I ST Asynchronous receive from infrared transceiver TXIR 7 7 O — Asy
MCP2122 2.0 DEVICE OPERATION TABLE 2-1: DEFAULT OUTPUT PIN STATES IN DEVICE RESET The MCP2122 is a low-cost infrared encoder/decoder. The baud rate is the same for the host UART and IR interfaces and is determined by the frequency of the 16XCLK signal, with a maximum baud rate of 115.2 Kbaud.
MCP2122 2.3.1 FIGURE 2-4: BROWN-OUTS Some applications may subject the MCP2122 to a brown-out condition. Good design practice requires that when a system is in brown-out, the system should be in reset to ensure that the system is in a known state when the system exits the brown-out. This brown-out circuitry is external to the MCP2122. 2.3.1.
MCP2122 2.4 16XCLK (Bit Clock) The MCP2122 requires an external clock source to operate. The 16XCLK pin is the device clock input (see Figure 2-5) and is independent of the host UART interface or the IR interface. The 16XCLK determines all timing during device operation. It is the edge of the 16XCLK pin that causes activity to occur. The 16XCLK signal can also be referred to as a bit clock (BITCLK). There are 16 BITCLKs for each bit time.
MCP2122 2.4.1 2.5 BAUD RATE The baud rate for the MCP2122 is determined by the frequency of the 16XCLK signal. Equation 2-1 demonstrates how to calculate the 16XCLK frequency based on the desired baud rate. Table 2-3 shows some common baud rates and the corresponding 16XCLK frequency. EQUATION 2-1: The IR encoder/decoder is made up of two major components. They are: • IR Decoder • IR Encoder The encoder receives UART data (bit by bit) and outputs a data bit in the IrDA standard bit format.
MCP2122 2.5.3 ENCODING AND SCREEN CAPTURES TABLE 2-4: Table 2-4 shows the TXIR pin high-time at different common baud rates. The internal TXIR pulse-width high-time limiter is a feature that minimizes the system current consumption at lower baud rates. The IrDA standard specification requires that optical receiver circuitry detect pulses as narrow as 1.41 µs (1.63 µs is the typical time at 115200 baud).
MCP2122 FIGURE 2-10: MCP2122 AT 9600 BAUD WAVEFORM TXIR 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 16XCLK Pulse A B Jitter of the TX input relative to the 16XCLK and TXIR DS21894C-page 10 Preliminary © 2007 Microchip Technology Inc.
MCP2122 2.6 Host UART Interface 2.7 The UART interface is used to communicate with the Host Controller. Though a UART is capable of a fullduplex interface, the direct coupling to the IR encoder/ decoder allows only half-duplex operation (since the IR side is either receiving or transmitting and not both at the same time). This means that the system can’t transmit and receive at the same time. 2.6.1 There will be some jitter on the detection of the high-tolow edge of the start bit.
MCP2122 NOTES: DS21894C-page 12 Preliminary © 2007 Microchip Technology Inc.
MCP2122 3.0 DEVELOPMENT TOOLS The MCP212X Developer’s Daughter Board is used to evaluate and demonstrate the MCP2122 or the MCP2120 IrDA® Standard Encoder/Decoder devices. A header allows the MCP212X Developer’s Daughter Board to be jumpered easily into systems for development purposes. The MCP212X Developer’s Daughter Board is designed to interface to several of the “new” low cost PIC® Demo Boards.
MCP2122 NOTES: DS21894C-page 14 Preliminary © 2007 Microchip Technology Inc.
MCP2122 4.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings† Ambient Temperature under bias ........................................................................................................... –40°C to +125°C Storage Temperature ............................................................................................................................. –65°C to +150°C Voltage on VDD with respect to VSS .............................................................................................
MCP2122 FIGURE 4-1: VOLTAGE-FREQUENCY (16XCLK) GRAPH, -40°C ≤ TA ≤ +125°C 6.0 5.5 5.0 VDD (Volts) 4.5 4.0 3.5 3.0 2.5 2.0 1.8 0 1.8432 4 Frequency (MHz) DS21894C-page 16 Preliminary © 2007 Microchip Technology Inc.
MCP2122 4.1 DC Characteristics Standard Operating Conditions (unless otherwise specified) Operating Temperature: –40°C ≤ TA ≤ +125°C (Extended) DC Characteristics Param. No. Sym D001 VDD D010 IDD Characteristic Supply Voltage Supply Current (2) Min Typ (1) Max Units 1.8 — 5.5 V — 0.1 1 mA Conditions See Figure 4-1 FOSC = 1.8432 MHz, VDD = 5.5V (TX = H, RXIR = H) Transmitter (TX = L, RXIR = H) — — 300 µA FOSC = 1.8432 MHz, VDD = 1.8V (4) — — 1 mA FOSC = 1.8432 MHz, VDD = 5.
MCP2122 DC Characteristics (Continued) DC CHARACTERISTICS Param No. Sym VIL Characteristic Standard Operating Conditions (unless otherwise specified) Operating temperature –40°C ≤ TA ≤ +125°C (extended) Operating voltage VDD range as described in DC spec, Section 4.1 “DC Characteristics”. Min Typ (1) Max Units Conditions Input Low-Voltage Input pins D031 TX, RXIR Vss — 0.2 VDD V D032 RESET Vss — 0.2 VDD V 16XCLK Vss — 0.
MCP2122 DC Characteristics (Continued) Standard Operating Conditions (unless otherwise specified) Operating temperature: –40°C ≤ TA ≤ +125°C (Extended) Operating voltage VDD range as described in DC spec, Section 4.1 “DC Characteristics”. DC CHARACTERISTICS Param No. Min Typ (1) Max Units RX — — 0.6 V IOL = 2 mA, VDD = 1.8V TXIR — — 0.6 V IOL = 2 mA, VDD = 1.8V RX (2) VDD – 0.7 — — V IOH = -0.8 mA, VDD = 1.8V TXIR (2) VDD – 0.7 — — V IOH = -0.8 mA, VDD = 1.
MCP2122 4.2 Timing Parameter Symbology and Load Conditions The timing parameter symbols have been created following one of the following formats: 4.2.1 TIMING CONDITIONS The temperature and voltages specified in Table 4-2 apply to all timing specifications, unless otherwise noted. Figure 4-2 specifies the load conditions for the timing specifications. TABLE 4-1: SYMBOLOGY 1.
MCP2122 4.3 Timing Diagrams and Specifications FIGURE 4-3: EXTERNAL CLOCK TIMING Q4 Q1 Q3 Q2 Q4 Q1 16XCLK 1 TABLE 4-3: Sym 4 4 Standard Operating Conditions (unless otherwise specified) Operating Temperature: –40°C ≤ TA ≤ +125°C (Extended) Operating Voltage VDD range is described in Section 4.1 “DC Characteristics” Characteristic Min External 16XCLK Period (2, 3) 542.
MCP2122 FIGURE 4-4: I/O WAVEFORM 16XCLK RX or TXIR Pin New Value Old Value 20, 21 Note: Refer to Figure 4-2 for load conditions. TABLE 4-4: I/O TIMING REQUIREMENTS Standard Operating Conditions (unless otherwise specified) Operating Temperature: –40°C ≤ TA ≤ +125°C (Extended) Operating Voltage VDD range is described in Section 4.1 “DC Characteristics” AC Characteristics Param. No.
MCP2122 FIGURE 4-5: RESET AND DEVICE RESET TIMER TIMING VDD RESET 30 Internal RESET 34A 34A 34B 34B TXIR Pin RX Pin TABLE 4-5: RESET AND DEVICE RESET TIMER REQUIREMENTS Standard Operating Conditions (unless otherwise specified) Operating Temperature: –40°C ≤ TA ≤ +125°C (Extended) Operating Voltage VDD range is described in Section 4.1 “DC Characteristics”. AC Characteristics Param. No.
MCP2122 FIGURE 4-6: TX AND TXIR WAVEFORMS Bit Bit Bit Bit Bit ... IR100 16XCLK TX IR114 IR113 IR113 IR122 IR122 IR122 IR122 IR122 IR122 IR120 IR115 TXIR IR121 0 TABLE 4-6: 1 0 0 1 0 TX AND TXIR REQUIREMENTS Standard Operating Conditions (unless otherwise specified) Operating Temperature: –40°C ≤ TA ≤ +125°C (Extended) Operating Voltage VDD range is described in Section 4.1 “DC Characteristics”. AC Characteristics Param. No.
MCP2122 FIGURE 4-7: 16XCLK AND THE TX AND TXIR WAVEFORMS 16 CLK 16 CLK Data bit x Data bit x+1 16XCLK IR114 Bit Value to TX 0 1 IR113 IR113 IR122 IR115 6 CLK TXIRI (3 * 16XCLK pulses) IR121A TXIR Time Out IR121B TXIR pin IR121C IR124 IR123 TABLE 4-7: TX AND TXIR REQUIREMENTS Standard Operating Conditions (unless otherwise specified) Operating Temperature: –40°C ≤ TA ≤ +125°C (Extended) Operating Voltage VDD range is described in Section 4.1 “DC Characteristics”. AC Characteristics Param. No.
MCP2122 FIGURE 4-8: RXIR AND RX WAVEFORMS Bit Bit Bit IR132 IR132 Bit Bit ... IR110 16XCLK IR133 IR132 IR132 IR132 IR132 RXIR IR131A IR134 IR130 IR132 IR132 IR132 IR132 IR132 IR132 0 0 1 0 RX IR103 0 IR103 1 Note: Refer to Figure 4-2 for load conditions. TABLE 4-8: RXIR REQUIREMENTS Standard Operating Conditions (unless otherwise specified) Operating Temperature: –40°C ≤ TA ≤ +125°C (Extended) Operating Voltage VDD range is described in Section 4.1 “DC Characteristics”.
MCP2122 5.0 DC AND AC CHARACTERISTICS GRAPHS AND TABLES The graphs and tables are not available at this time © 2007 Microchip Technology Inc.
MCP2122 NOTES: DS21894C-page 28 Preliminary © 2007 Microchip Technology Inc.
MCP2122 6.0 PACKAGING INFORMATION 6.1 Package Marking Information Example: 8-Lead PDIP (300 mil) XXXXXXXX XXXXXNNN YYWW MCP2122 E/P e3 256 0706 8-Lead SOIC (150 mil) Example: XXXXXXXX XXXXYYWW NNN Legend: XX...
MCP2122 8-Lead Plastic Dual In-Line (P or PA) – 300 mil Body [PDIP] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging N NOTE 1 E1 1 3 2 D E A2 A L A1 c e eB b1 b Units Dimension Limits Number of Pins INCHES MIN N NOM MAX 8 Pitch e Top to Seating Plane A – – .210 Molded Package Thickness A2 .115 .130 .195 Base to Seating Plane A1 .015 – – Shoulder to Shoulder Width E .290 .310 .
MCP2122 8-Lead Plastic Small Outline (SN or OA) – Narrow, 3.90 mm Body [SOIC] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D e N E E1 NOTE 1 1 2 3 α h b h A2 A c φ L A1 β L1 Units Dimension Limits Number of Pins MILLIMETERS MIN N NOM MAX 8 Pitch e Overall Height A – 1.27 BSC – Molded Package Thickness A2 1.25 – – Standoff § A1 0.10 – 0.
MCP2122 FIGURE 6-1: EMBOSSED CARRIER DIMENSIONS (12 MM TAPE) Top Cover Tape A0 W B0 K0 P TABLE 6-1: CARRIER TAPE/CAVITY DIMENSIONS Case Outline Carrier Dimensions Package Type SN SOIC .150” FIGURE 6-2: 8L Cavity Dimensions W mm P mm A0 mm B0 mm K0 mm 12 8 6.4 5.2 2.
MCP2122 APPENDIX A: REVISION HISTORY Revision C (February 2007) • Updated Development Tools section • Update packaging outline drawings • Updates Product Identification System section. Revision B (September 2004) • Undocumented changes Revision A (June 2004) • Original release of this document © 2007 Microchip Technology Inc.
MCP2122 NOTES: DS21894C-page 34 Preliminary © 2007 Microchip Technology Inc.
MCP2122 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO.
MCP2122 NOTES: DS21894C-page 36 Preliminary © 2007 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature.
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