Datasheet
© 2007 Microchip Technology Inc. DS21618B-page 5
MCP2120
2.0 DEVICE OPERATION
The MCP2120 is a low cost infrared Encoder/Decoder.
The baud rate is user selectable to standard IrDA baud
rates between 9600 baud to 115.2 kbaud. The maxi-
mum baud rate is 312.5 kbaud.
2.1 Power-up
Any time that the device is powered up, the Device
Reset Timer delay (parameter 32) must occur before
any communication with the device is initiated. This is
from both the infrared transceiver side as well as the
controller UART interface.
2.2 Device Reset
The MCP2120 is forced into the reset state when the
RESET pin is in the low state. After the RESET pin is
brought to a high state, the Device Reset Timer occurs.
Once the DRT times out, normal operation occurs.
2.3 Bit Clock
The device crystal is used to derive the communication
bit clock (BITCLK). There are 16 BITCLKs for each bit
time. The BITCLKs are used for the generation of the
Start bit and the eight data bits. The Stop bit uses the
BITCLK when the data is transmitted (not for recep-
tion).
This clock is a fixed frequency, and has minimal varia-
tion in frequency (specified by crystal manufacturer).
2.4 UART Interface
The UART interface communicates with the "control-
ler". This interface is a Half duplex interface, meaning
that the system is either transmitting or receiving, but
not both at the same time.
2.4.1 BAUD RATE
The baud rate for the MCP2120 can be configured
either by the state of three hardware pins (BAUD2,
BAUD1, and BAUD0) or through software selection.
2.4.1.1 Hardware Selection
Three device pins are used to select the baud rate that
the MCP2120 will transmit and receive data. These
pins are called BAUD2, BAUD1, and BAUD0. There is
one pin state (device mode) where the application soft-
ware can specify the baud rate. Table 2-1 shows the
baud rate configurations.
TABLE 2-1: HARDWARE BAUD RATE SELECTION VS. FREQUENCY
BAUD2:BAUD0
Frequency (MHz)
Bit Rate0.6144
(1)
2.000 3.6864 4.9152 7.3728 14.7456
(2)
20.000
(2)
000 800 2604 4800 6400 9600 19200 26042 FOSC / 768
001
1600 5208 9600 12800 19200 38400 52083 FOSC / 384
010 3200 10417 19200 25600 38400 78600 104167 FOSC / 192
011
4800 15625 28800 38400 57600 115200 156250 FOSC / 128
100
9600 31250 57600 78600 115200 230400 312500 FOSC / 64
Note 1: An external clock is recommended for frequencies below 2 MHz.
2: For frequencies above 7.5 MHz, the TXIR pulse width (parameter IR121) will be shorter than the minimum
pulse width of 1.6 µs in the IrDA standard specification.