Datasheet

© 2011 Microchip Technology Inc. DS93067A-page 3
TB3067
FIGURE 3: Switching Timing Diagram for the Forced Power-Down Mode Sequence.
TXD
V
REN
CS
Ready
Mode
Transmitter OFF
Mode
Power Down
Mode after Master
Sleep instruction
Power Down
Mode
tTx2CS >= 100ns tCSactive >= 10s
TXD to 0
forced
externally
TXD state depending
on how t he S lave
Microcontroller is
powered
LBUS
State
LI N bus
disconnected