Datasheet

 2013 Microchip Technology Inc. DS22331A-page 9
MCP19111
FIGURE 1-3: MICROCONTROLLER CORE BLOCK DIAGRAM
Flash
Program
Memory
13
Data Bus
8
14
Program
Bus
Instruction reg
Program Counter
RAM
File
Registers
Direct Addr
7
RAM Addr
9
Addr MUX
Indirect
Addr
FSR reg
STATUS reg
MUX
ALU
W reg
Instruction
Decode &
Control
Timing
Generation
TESTCLKIN
PORTA
8
8
8
3
8 Level Stack
256
4K x 14
bytes
(13-bit)
Power-up
Timer
Power-on
Reset
Watchdog
Timer
MCLR
V
IN
VSS
Timer0 Timer1
T0CKI
Configuration
8 MHz Internal
Oscillator
Timer2
MSSP
GPA0
GPA1
GPA2
GPA3
GPA4
GPA5
Analog interface
SDA
SCL
PMDATL
EEADDR
Self read/
write flash
memory
registers
PORTB
GPB0
GPB1
GPB2
GPB6
GPB4
PWM
GPB5
GPA6
GPA7
GPB7