Datasheet

 2013 Microchip Technology Inc. DS22331A-page 83
MCP19111
14.0 RESETS
The reset logic is used to place the MCP19111 into a
known state. The source of the reset can be
determined by using the device status bits.
There are multiple ways to reset this device:
• Power-on Reset (POR)
• Overtemperature Reset (OT)
•MCLR
Reset
•WDT Reset
To allow V
DD
to stabilize, an optional power-up timer
can be enabled to extend the Reset time after a POR
event.
Some registers are not affected in any Reset condition;
their status is unknown on POR and unchanged in any
other Reset. Most other registers are reset to a “Reset
state” on:
• Power-on Reset
•MCLR
Reset
•MCLR
Reset during Sleep
• WDT Reset
WDT wake-up does not cause register resets in the
same manner as a WDT Reset since wake-up is
viewed as the resumption of normal operation. TO
and
PD
bits are set or cleared differently in different Reset
situations, as indicated in Table 14-1. Software can use
these bits to determine the nature of the Reset. See
Table 14-2 for a full description of Reset states of all
registers.
A simplified block diagram of the On-Chip Reset Circuit
is shown in Figure 14-1.
The MCLR
Reset path has a noise filter to detect and
ignore small pulses. See Section 5.0 “Digital
Electrical Characteristics” for pulse-width
specifications.
FIGURE 14-1: SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
S
R
Q
External
Reset
MCLR/V
PP
pin
V
DD
WDT
Module
V
DD
Rise
Detect
On-Chip
WDT
Time-out
Power-on Reset
PWRT
Chip_Reset
11-bit Ripple Counter
Reset
Enable PWRT
Sleep
Note 1: Refer to the Configuration Word register (Register 12-1).
RC OSC
TABLE 14-1: TIME-OUT IN VARIOUS
SITUATIONS
Power-up
Wake-up from
Sleep
PWRTE
= 0 PWRTE = 1
T
PWRT
——