Datasheet

MCP19111 DS22331A-page 8  2013 Microchip Technology Inc.
FIGURE 1-2: MCP19111 SYNCHRONOUS BUCK BLOCK DIAGRAM
PHASE
HDRV
LDRV
V
IN
V
DD
BOOT
V
IN
V
OUT
VDAC
AV
DD
LDO1
LDO2
Bias Gen
BGAP
UVLO
4
4
V
ZC
5
Slave
Mode
Master
Mode
VREGREF
UV REF
OV REF
8+5
8
8
V
OUT
V
OUT
V
OUT
OV
UV
BGAP
Lo_on
4
AV
DD
V
DD
5
OC
Comp
V
IN
DLY
4
LVL_SFT
PIC CORE
Debug
MUX
Lo_on
OV UV
V
IN_OK
OC
FLAG
A/D Mux
V
DR
-I
SEN
+V
SEN
-V
SEN
+I
SEN
+I
SEN
-I
SEN
+V
SEN
-V
SEN
GND
PGND
I/O(Digital Signals)
15
I/O
I/O
6
R
5R
V
DR
DLY
4
4
3
To ADC
CSDGEN
bit
dc current sense gain
ac current sense gain