Datasheet

MCP19111
DS22331A-page 44  2013 Microchip Technology Inc.
6.9 MOSFET Driver Programmable
Dead Time
The turn-on delay of the high-side and low-side drive
signals can be configured independently to allow differ-
ent MOSFETs and circuit board layouts to be used to
construct an optimized system. See Figure 6-2.
Setting the HDLYBY and LDLYBY bits of the PE1
register enables the high-side and low-side delay,
respectively. The amount of delay added is controlled
in the DEADCON register. See Register 6-9 for more
information.
FIGURE 6-2: MOSFET DRIVER
DEAD TIME
HDLY
LDLY
HDRV
LDRV
REGISTER 6-9: DEADCON: DRIVER DEAD TIME CONTROL REGISTER
R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x
HDLY3 HDLY2 HDLY1 HDLY0 LDLY3 LDLY2 LDLY1 LDLY0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-4 HDLY<3:0>: High-Side Dead Time Configuration bits
0000 = 11 ns delay
0001 = 15 ns delay
0010 = 19 ns delay
0011 = 23 ns delay
0100 = 27 ns delay
0101 = 31 ns delay
0110 = 35 ns delay
0111 = 39 ns delay
1000 = 43 ns delay
1001 = 47 ns delay
1010 = 51 ns delay
1011 = 55 ns delay
1100 = 59 ns delay
1101 = 63 ns delay
1110 = 67 ns delay
1111 = 71 ns delay
bit 3-0 LDLY<3:0>: Low-Side Dead Time Configuration bits
0000 = 4 ns delay
0001 = 8 ns delay
0010 = 12 ns delay
0011 = 16 ns delay
0100 = 20 ns delay
0101 = 24 ns delay
0110 = 28 ns delay
0111 = 32 ns delay
1000 = 36 ns delay
1001 = 40 ns delay
1010 = 44 ns delay
1011 = 48 ns delay
1100 = 52 ns delay
1101 = 56 ns delay
1110 = 60 ns delay
1111 = 64 ns delay