Datasheet
2013 Microchip Technology Inc. DS22331A-page 25
MCP19111
Linear Regulator
Bias Voltage, LDO Output
V
DD
4.6 5.0 5.4 VV
IN
= 6.0V to 32V, Note 2
Internal Circuitry
Bias Voltage
AV
DD
— 5.0 — VV
IN
= 6.0V to 32V, Note 2
Maximum V
DD
Output
Current
I
DD
30 ——mAV
IN
= 6.0V to 20V,
V
DD
=5.0V,
Note 2
Line Regulation V
DD
/
(V
DD
x V
IN
)
—0.050.1 %/V (V
DD
+1.0V) V
IN
20V
Note 2
Load Regulation V
DD
/V
DD
-1.75 -0.8 +0.5 %I
DD
= 1 mA to 30 mA
Note 2
Output Short
Circuit Current
I
DD_SC
—65—mAV
IN
=(V
DD
+1.0V)
Note 2
Dropout Voltage V
IN
–V
DD
—0.51 VI
DD
=30mA,
V
IN
=V
DD
+1.0V
Note 2
Power Supply
Rejection Ratio
PSRR
LDO
—60—dBf 1000 Hz, I
DD
=25mA,
C
IN
=0µF, C
DD
=1µF
Band Gap Voltage BG -2.5% 1.23 +2.5% V
GPIO Pins
Maximum GPIO
Sink Current
I
SINK_GPIO
——90mANote 3, Note 1
Maximum GPIO
Source Current
I
SOURCE_GPIO
——90mANote 3, Note 1
GPIO Weak
Pull-up Current
I
PULL-UP_GPIO
50 250 400 µA V
DD
=5V
GPIO Output Low
Voltage
V
OL
——0.6VI
OL
=7mA, V
DD
=5V,
T
A
=+90°C
GPIO Output
High Voltage
V
OH
V
DD
–0.7 — — V I
OH
=-2.5mA, V
DD
=5V,
T
A
=+90°C
GPIO Input
Leakage Current
GPIO_I
IL
— ±0.1 ±1 µA Negative current is defined as
current sourced by the pin,
T
A
=+90°C
GPIO Input Low Voltage V
IL
GND — 0.8 V I/O Port with TTL buffer
V
DD
=5V, T
A
=+90°C
GND 0.2V
DD
V I/O Port with Schmitt Trigger
buffer, V
DD
=5V, T
A
=+90°C
GND 0.2V
DD
VMCLR, T
A
= +90°C
4.2 Electrical Characteristics (Continued)
Electrical Specifications: Unless otherwise noted, V
IN
= 12V, V
REF
= 1.2V, F
SW
=300kHz, T
A
=+25°C.
Boldface specifications apply over the T
A
range of -40°C to +125°C.
Parameter Symbol Min Typ Max Units Conditions
Note 1: Ensured by design. Not production tested.
2: V
DD-OUT
is the voltage present at the V
DD
pin. V
DD
is the internally generated bias voltage.
3: This is the total source current for all GPIO pins combined. Individually, each pin can source a maximum of
25 mA.
4: PE1 = 0x00h, ABECON = 0x00h, ATSTCON = 0x80h, WPUGPA = 0x00h, WPUGPB = 0x00h, and
SLEEP command issued to PIC core, see SECTION 16.0.