Datasheet

 2013 Microchip Technology Inc. DS22331A-page 139
MCP19111
25.2 Timer2 Control Register
REGISTER 25-1: T2CON: TIMER2 CONTROL REGISTER
U-0 U-0 U-0 U-0 U-0 R/W-0 R/W-0 R/W-0
— — — — — TMR2ON T2CKPS1 T2CKPS0
bit 7 bit 0
Legend:
R = Readable bit P = Programmable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-3 Unimplemented: Read as ‘0’
bit 2 TMR2ON: Timer2 On bit
1 = Timer2 is on
0 = Timer2 is off
bit 1-0 T2CKPS<1:0>: Timer2 Clock Prescale Select bits
00 =Prescaler is 1
01 =Prescaler is 4
10 =Prescaler is 8
11 =Prescaler is 16
TABLE 25-1: SUMMARY OF REGISTERS ASSOCIATED WITH TIMER2
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on Page
INTCON GIE PEIE
T0IE INTE IOCE T0IF INTF IOCF 93
PIE1 — ADIE BCLIE SSPIE — —TMR2IETMR1IE 94
PIR1
— ADIF BCLIF SSPIF — —TMR2IFTMR1IF 96
PR2 Timer2 Module Period Register 138*
T2CON — — — — — TMR2ON T2CKPS1 T2CKPS0 139
TMR2 Holding Register for the 8-bit TMR2 Time Base 138*
Legend: — = unimplemented read as ‘0’. Shaded cells are not used for Timer2 module.
* Page provides register information.