Datasheet

 2013 Microchip Technology Inc. DS22331A-page 111
MCP19111
19.2.3 ANSELA REGISTER
The ANSELA register (Register 19-5) is used to
configure the Input mode of an I/O pin to analog.
Setting the appropriate ANSELA bit high will cause all
digital reads on the pin to be read as ‘0’ and allows
analog functions on the pin to operate correctly.
The state of the ANSELA bits has no effect on the dig-
ital output functions. A pin with TRIS clear and ANSEL
set will still operate as a digital output, but the Input
mode will be analog. This can cause unexpected
behavior when executing read-modify-write instruc-
tions on the affected port.
19.2.4 PORTGPA FUNCTIONS AND
OUTPUT PRIORITIES
Each PORTGPA pin is multiplexed with other functions.
The pins, their combined functions and their output
priorities are shown in Table 19-1. For additional
information, refer to the appropriate section in this data
sheet.
PORTGPA pins GPA7 and GPA4 are true open-drain
pins with no connection back to V
DD
.
When multiple outputs are enabled, the actual pin
control goes to the peripheral with the highest priority.
Analog input functions, such as ADC, are not shown in
the priority lists. These inputs are active when the I/O
pin is set for Analog mode using the ANSELx registers.
Digital output functions may control the pin when it is in
Analog mode with the priority shown in Table 19-1.
Note: The ANSELA bits default to the Analog
mode after Reset. To use any pins as
digital general purpose or peripheral
inputs, the corresponding ANSEL bits
must be initialized to ‘0’ by user software.
TABLE 19-1: PORTGPA OUTPUT PRIORITY
Pin Name Function Priority
(1)
GPA0 GPA0
AN0
ANALOG_TEST
ALT_ICSPDAT1
GPA1 GPA1
AN1
CLKPIN
ALT_ICSPCLK1
GPA2 GPA2
AN2
T0CKI
INT
GPA3 GPA3
AN3
GPA4 GPA4 (open drain input/output)
GPA5 GPA5 (open drain data input only)
GPA6 GPA6
ALT_ICSPDAT2
GPA7 GPA7 (open drain output)
SCL
ALT_ICSPCLK2
Note 1: Priority listed from highest to lowest.
REGISTER 19-2: PORTGPA: PORTGPA REGISTER
R/W-x R/W-x R-x R-x R/W-x R/W-x R/W-x R/W-x
GPA7 GPA6 GPA5 GPA4 GPA3 GPA2 GPA1 GPA0
bit 7 bit 0
Legend:
R = Readable bit P = Programmable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7 GPA7: General Purpose Open Drain I/O pin.
bit 6 GPA6: General Purpose I/O pin.
1 = Port pin is > V
IH
0 = Port pin is < V
IL
bit 5 GPA5/MCLR: General Purpose Open Drain I/O pin.
bit 4 GPA7: General Purpose Open Drain I/O pin.
bit 3-0 GPA<3:0>: General Purpose I/O pin.
1 = Port pin is > V
IH
0 = Port pin is < V
IL