Datasheet

 2013 Microchip Technology Inc. DS22331A-page 11
MCP19111
GPB5/AN7/ICSPCLK/
ALT_CLKPIN
GPB5 TTL CMOS General purpose I/O
AN7 AN — A/D Channel 7 input
ISCPCLK ST — Primary Serial Programming Clock
ALT_CLKPIN — — Alternate switching frequency clock input
or output
(2,3)
GPB6 GPB6 TTL CMOS General purpose I/O
GPB7 GPB7 TTL CMOS General purpose I/O
V
IN
V
IN
— — Device input supply voltage
V
DD
V
DD
— — Internal +5V LDO output pin
V
DR
V
DR
— — Gate drive supply input voltage pin
GND GND — — Small signal quiet ground
P
GND
P
GND
— — Large signal power ground
LDRV LDRV — — High-current drive signal connected to the gate
of the low-side MOSFET
HDRV HDRV — — Floating high-current drive signal connected to
the gate of the high-side MOSFET
PHASE PHASE — — Synchronous buck switch node connection
BOOT BOOT — — Floating bootstrap supply
+V
SEN
+V
SEN
— — Positive input of the output voltage sense
differential amplifier
-V
SEN
-V
SEN
— — Negative input of the output voltage sense
differential amplifier
+I
SEN
+I
SEN
— — Current sense input
-I
SEN
-I
SEN
— — Current sense input
EP — — — Exposed Thermal Pad
TABLE 2-1: MCP19111 PINOUT DESCRIPTION (CONTINUED)
Name Function
Input
Type
Output
Type
Description
Legend: AN = Analog input or output CMOS =CMOS compatible input or output OD = Open Drain
TTL = TTL compatible input ST =Schmitt Trigger input with CMOS levels I
2
C = Schmitt Trigger input with I
2
C
Note 1: Analog Test is selected when the ATSTCON<BNCHEN> bit is set.
2: Selected when device is functioning as multiple output master or slave by proper configuration of the MLTPH<2:0> bits
in the BUFFCON register.
3: Selected when device is functioning as multi-phase master or slave by proper configuration of the MLTPH<2:0> bits in
the BUFFCON register.