Datasheet

 2011-2013 Microchip Technology Inc. DS20002276C-page 19
MCP1754/MCP1754S
The SHDN input ignores low going pulses (pulses
meant to shut down the LDO) that are up to 400 ns in
pulse width. If the shutdown input is pulled low for more
than 400 ns, the LDO enters Shutdown mode. This
small bit of filtering helps to reject any system noise
spikes on the shutdown input signal.
On the rising edge of the SHDN
input, the shutdown
circuitry has a 70 µs delay before allowing the LDO
output to turn on. This delay helps to reject any false
turn-on signals or noise on the SHDN
input signal. After
the 70 µs delay, the LDO output enters its soft-start
period as it rises from 0V to its final regulation value. If
the SHDN
input signal is pulled low during the 70 µs
delay period, the timer resets and the delay time starts
over again on the next rising edge of the SHDN
input.
The total time from the SHDN
input going high (turn-on)
to the LDO output being in regulation is typically
160 µs. See Figure 4-4 for a timing diagram of the
SHDN
input.
FIGURE 4-4: Shutdown Input Timing
Diagram.
4.7 Dropout Voltage and Undervoltage
Lockout
Dropout voltage is defined as the input-to-output
voltage differential at which the output voltage drops
2% below the nominal value that was measured with a
V
R
+ 1.0V differential applied. The MCP1754/
MCP1754S LDO has a very low dropout voltage
specification of 300 mV (typical) at 150 mA of output
current. See Section 1.0 “Electrical Characteristics”
for maximum dropout voltage specifications.
The MCP1754/MCP1754S LDO operates across an
input voltage range of 3.6V to 16.0V and incorporates
input Undervoltage Lockout (UVLO) circuitry that keeps
the LDO output voltage off until the input voltage
reaches a minimum of 2.95V (typical) on the rising
edge of the input voltage. As the input voltage falls, the
LDO output remains on until the input voltage level
reaches 2.70V (typical).
For high-current applications, voltage drops across the
PCB traces must be taken into account. The trace
resistances can cause significant voltage drops
between the input voltage source and the LDO. For
applications with input voltages near 3.0V, these PCB
trace voltage drops can sometimes lower the input
voltage enough to trigger a shutdown due to
undervoltage lockout.
4.8 Overtemperature Protection
The MCP1754/MCP1754S LDO has temperature-
sensing circuitry to prevent the junction temperature
from exceeding approximately +150°C. If the LDO
junction temperature does reach +150
°C, the LDO
output is turned off until the junction temperature cools
to approximately +137°C, at which point the LDO
output automatically resumes normal operation. If the
internal power dissipation continues to be excessive,
the device will again shut off. The junction temperature
of the die is a function of power dissipation, ambient
temperature and package thermal resistance. See
Section 5.0 “Application Circuits and Issues” for
more information on LDO power dissipation and
junction temperature.
SHDN
V
OUT
70 µs
90 µs
T
DELAY_SHDN
400 ns (typical)